AGC: honour DCC fast clears instead of drawing the clear quad (#738)

On GFX10 a colour clear is not a packet. The driver programs
CB_COLORn_CLEAR_WORD0/1 and draws a covering quad which the colour block
turns into DCC clear codes, discarding whatever the pixel shader
exported. We executed that quad as an ordinary draw, so the shaded output
landed in the surface instead of a clear.

That alone would be a wrong-pixels bug, but the blend those quads use
makes it compound. Every draw into the target blends src=ONE,
dst=ONE_MINUS_SRC_ALPHA, so alpha follows a <- a_src + a_dst*(1 - a_src),
whose fixed point is 1. A guest colour attachment is cleared once on
first use and loaded on every pass after, so nothing ever resets it and
the channel climbs until it saturates. Where such a surface is a
compositing layer, the final image is ui.rgb + scene.rgb*(1 - ui.a) and a
saturated alpha multiplies the scene away entirely - the scene renders
correctly the whole time and is then masked to black.

Recognise the clear and perform it: the attachment is reset and the quad
is dropped, which reproduces the observable effect without modelling DCC
block state. The reset drops the image's Initialized flag so the next
render pass clears via AttachmentLoadOp.Clear, rather than enqueuing a
CmdClearColorImage - the latter lands outside the following render pass,
and a target cleared that way was still observed reading back its
previous contents.

Restricted to clear-to-zero: the reset clears to zero, so a nonzero
CLEAR_WORD would be cleared to the wrong colour and is left to be drawn.
Zero is zero under every encoding the register pair can carry, so the
test needs no format handling.

The clip-space span test is load-bearing rather than defensive. Fills
sharing the vertex count, topology and blend outnumber the clears by two
orders of magnitude and sit well outside the frame; treating those as
clears erases the UI and blanks video surfaces.

src/SharpEmu.GUI/MainWindow.axaml

@@ -1220,8 +1220,13 @@ SPDX-License-Identifier: GPL-2.0-or-later
                     <StackPanel Spacing="8">
                       <!--Latest commit info-->
                       <Border Classes="optionsInfoRow">
-                        <Grid ColumnDefinitions="*,Auto" ColumnSpacing="18">
-                          <StackPanel VerticalAlignment="Center">
+                        <Grid ColumnDefinitions="Auto,*,Auto" ColumnSpacing="18">
+                               <Image Grid.Column="0"
+                                 Source="avares://SharpEmu.GUI/Assets/commit-icon.png"
+                                 Width="20" Height="20"
+                                 VerticalAlignment="Center"
+                                 Margin="0,0,12,0" />
+                          <StackPanel Grid.Column="1" VerticalAlignment="Center">
                             <TextBlock x:Name="LatestCommitLabel"
                                        Text="{Binding [About.Github.LatestCommitLabel], Source={x:Static local:Localization.Instance}}"
                                        FontSize="14"
@@ -1232,7 +1237,7 @@ SPDX-License-Identifier: GPL-2.0-or-later
                                        Foreground="{StaticResource SettingsDescriptionBrush}"
                                        TextWrapping="Wrap" />
                           </StackPanel>
-                          <Button Grid.Column="1"
+                          <Button Grid.Column="2"
                                   x:Name="LatestCommitHashText"
                                   Classes="optionAction"
                                   Content="Loading…"
@@ -1245,8 +1250,13 @@ SPDX-License-Identifier: GPL-2.0-or-later
 
                       <!--Update-->
                       <Border Classes="optionsInfoRow">
-                        <Grid ColumnDefinitions="*,Auto" ColumnSpacing="18">
-                          <StackPanel VerticalAlignment="Center">
+                        <Grid ColumnDefinitions="Auto,*,Auto" ColumnSpacing="18">
+                               <Image Grid.Column="0"
+                                 Source="avares://SharpEmu.GUI/Assets/update-icon.png"
+                                 Width="20" Height="20"
+                                 VerticalAlignment="Center"
+                                 Margin="0,0,12,0" />
+                          <StackPanel Grid.Column="1" VerticalAlignment="Center">
                             <TextBlock x:Name="UpdateLabel"
                                        Text="{Binding [Updater.Label], Source={x:Static local:Localization.Instance}}"
                                        FontSize="14"
@@ -1257,7 +1267,7 @@ SPDX-License-Identifier: GPL-2.0-or-later
                                        Foreground="{StaticResource SettingsDescriptionBrush}"
                                        TextWrapping="Wrap" />
                           </StackPanel>
-                          <Button Grid.Column="1"
+                          <Button Grid.Column="2"
                                   x:Name="UpdateButton"
                                   Classes="optionAction"
                                   Content="Check for updates"
@@ -1267,8 +1277,13 @@ SPDX-License-Identifier: GPL-2.0-or-later
                       
                       <!--Github-->
                       <Border Classes="optionsInfoRow">
-                        <Grid ColumnDefinitions="*,Auto" ColumnSpacing="18">
-                          <StackPanel VerticalAlignment="Center">
+                        <Grid ColumnDefinitions="Auto,*,Auto" ColumnSpacing="18">
+                               <Image Grid.Column="0"
+                                 Source="avares://SharpEmu.GUI/Assets/github.png"
+                                 Width="20" Height="20"
+                                 VerticalAlignment="Center"
+                                 Margin="0,0,12,0" />
+                          <StackPanel Grid.Column="1" VerticalAlignment="Center">
                             <TextBlock x:Name="GithubLabel"
                                        Text="{Binding [About.Github.Label], Source={x:Static local:Localization.Instance}}"
                                        FontSize="14"
@@ -1279,7 +1294,7 @@ SPDX-License-Identifier: GPL-2.0-or-later
                                        Foreground="{StaticResource SettingsDescriptionBrush}"
                                        TextWrapping="Wrap" />
                           </StackPanel>
-                          <Button Grid.Column="1"
+                          <Button Grid.Column="2"
                                   x:Name="GithubButton"
                                   Classes="optionAction"
                                   Content="{Binding [About.GithubButton], Source={x:Static local:Localization.Instance}}"
@@ -1289,8 +1304,13 @@ SPDX-License-Identifier: GPL-2.0-or-later
 
                       <!--Discord-->
                       <Border Classes="optionsInfoRow">
-                        <Grid ColumnDefinitions="*,Auto" ColumnSpacing="18">
-                          <StackPanel VerticalAlignment="Center">
+                        <Grid ColumnDefinitions="Auto,*,Auto" ColumnSpacing="18">
+                               <Image Grid.Column="0"
+                                 Source="avares://SharpEmu.GUI/Assets/discord.png"
+                                 Width="20" Height="20"
+                                 VerticalAlignment="Center"
+                                 Margin="0,0,12,0" />
+                          <StackPanel Grid.Column="1" VerticalAlignment="Center">
                             <TextBlock x:Name="DiscordServerLabel"
                                       Text="{Binding [About.Discord.Label], Source={x:Static local:Localization.Instance}}"
                                       FontSize="14"
@@ -1301,7 +1321,7 @@ SPDX-License-Identifier: GPL-2.0-or-later
                                       Foreground="{StaticResource SettingsDescriptionBrush}"
                                       TextWrapping="Wrap" />
                           </StackPanel>
-                          <TextBlock Grid.Column="1"
+                          <TextBlock Grid.Column="2"
                                      x:Name="DiscordComingSoonText"
                                      Text="{Binding [About.DiscordComingSoon], Source={x:Static local:Localization.Instance}}"
                                      FontSize="12"

src/SharpEmu.Libs/Agc/AgcExports.cs

@@ -95,8 +95,11 @@ public static partial class AgcExports
     private const uint SpiShaderPgmRsrc1Hs = 0x10A;
     private const uint SpiShaderPgmLoLs = 0x148;
     private const uint SpiShaderPgmHiLs = 0x149;
-    private const uint SpiShaderPgmLoGs = 0x8A;
-    private const uint SpiShaderPgmHiGs = 0x8B;
+    // Not 0x8A/0x8B - those are SPI_SHADER_PGM_RSRC1/RSRC2_GS, and reading them
+    // as an address yields a 58-bit value (observed live: 0x30004622C008300).
+    private const uint SpiShaderPgmLoGs = 0x88;
+    private const uint SpiShaderPgmHiGs = 0x89;
+    private const uint SpiShaderPgmRsrc1Gs = 0x8A;
     private const uint SpiShaderPgmChksumGs = 0x80;
     private const uint SpiPsInputEna = 0x1B3;
     private const uint SpiPsInputAddr = 0x1B4;
@@ -139,9 +142,15 @@ public static partial class AgcExports
     private const uint CbColor0Base = 0x318;
     private const uint CbColorRegisterStride = 15;
     private const uint CbColor0Info = 0x31C;
+    private const uint CbColor0ClearWord0 = 0x323;
+    private const uint CbColor0ClearWord1 = 0x324;
     private const uint CbColor0BaseExt = 0x390;
     private const uint CbColor0Attrib2 = 0x3B0;
     private const uint CbColor0Attrib3 = 0x3B8;
+    // CB_COLORn_INFO.DCC_ENABLE (gc_10_1_0_sh_mask.h). On GFX10 the legacy
+    // FAST_CLEAR and COMPRESSION bits stay clear because DCC, not CMASK,
+    // carries the compression.
+    private const uint CbColorInfoDccEnableMask = 1u << 28;
     private const uint CbBlend0Control = 0x1E0;
     private const uint PaScModeCntl0 = 0x292;
     // GFX10 DB context registers (register byte address minus 0x28000, / 4).
@@ -501,7 +510,8 @@ public static partial class AgcExports
         float ClearRed = 0f,
         float ClearGreen = 0f,
         float ClearBlue = 0f,
-        float ClearAlpha = 1f);
+        float ClearAlpha = 1f,
+        bool IsDccFastClear = false);
 
     private sealed record TranslatedImageBinding(
         TextureDescriptor Descriptor,
@@ -2174,6 +2184,18 @@ public static partial class AgcExports
         return (int)ctx[CpuRegister.Rax];
     }
 
+    [SysAbiExport(
+        Nid = "r98I08t+LOg",
+        ExportName = "sceAgcDcbDrawIndexIndirectMultiGetSize",
+        Target = Generation.Gen5,
+        LibraryName = "libSceAgc")]
+    public static int DcbDrawIndexIndirectMultiGetSize(CpuContext ctx)
+    {
+        // Eight, matching the packet DcbDrawIndexIndirectMulti emits.
+        ctx[CpuRegister.Rax] = 8u * sizeof(uint);
+        return (int)ctx[CpuRegister.Rax];
+    }
+
     [SysAbiExport(
         Nid = "rUuVjyR+Rd4",
         ExportName = "sceAgcDcbGetLodStatsGetSize",
@@ -6426,6 +6448,48 @@ public static partial class AgcExports
         }
     }
 
+    /// <summary>
+    /// Test-only view of a parsed graphics context register. False when the
+    /// register was never written.
+    /// </summary>
+    internal static bool TryGetGraphicsContextRegisterForTests(
+        CpuContext ctx,
+        uint registerOffset,
+        out uint value)
+    {
+        value = 0;
+        if (!_submittedGpuStates.TryGetValue(ctx.Memory, out var gpuState))
+        {
+            return false;
+        }
+
+        lock (gpuState.Gate)
+        {
+            return gpuState.Graphics.CxRegisters.TryGetValue(registerOffset, out value);
+        }
+    }
+
+    /// <summary>
+    /// SH-register counterpart of <see cref="TryGetGraphicsContextRegisterForTests"/>;
+    /// the shader stage addresses live here.
+    /// </summary>
+    internal static bool TryGetGraphicsShRegisterForTests(
+        CpuContext ctx,
+        uint registerOffset,
+        out uint value)
+    {
+        value = 0;
+        if (!_submittedGpuStates.TryGetValue(ctx.Memory, out var gpuState))
+        {
+            return false;
+        }
+
+        lock (gpuState.Gate)
+        {
+            return gpuState.Graphics.ShRegisters.TryGetValue(registerOffset, out value);
+        }
+    }
+
     /// <summary>
     /// GraphicsDcbSetIndexSize writes VGT_INDEX_TYPE via SET_UCONFIG_REG.
     /// Mirror that into <see cref="SubmittedDcbState.IndexSize"/>.
@@ -6808,6 +6872,29 @@ public static partial class AgcExports
                     $"dst=0x{resolveDestination.Address:X16}");
             }
 
+            // A DCC fast clear writes metadata only; the colour block discards
+            // the quad's shaded output. Reset the attachment and drop the draw,
+            // which reproduces the observable effect of a clear to zero without
+            // modelling DCC block state.
+            if (translatedDraw.IsDccFastClear)
+            {
+                foreach (var target in translatedDraw.GuestTargets)
+                {
+                    if (target.Address != 0)
+                    {
+                        VulkanVideoPresenter.RequestGuestColorClear(target.Address);
+                    }
+                }
+
+                ReturnPooledDrawArrays(
+                    translatedDraw,
+                    globals: true,
+                    vertex: true,
+                    index: true);
+                state.TranslatedDraw = null;
+                return;
+            }
+
             var firstTarget = translatedDraw.RenderTargets.FirstOrDefault();
             if (firstTarget.Address != 0)
             {
@@ -7444,22 +7531,6 @@ public static partial class AgcExports
             }
         }
 
-        state.UcRegisters.TryGetValue(VgtPrimitiveType, out var earlyPrimitiveType);
-        if (IsRectListPrimitive(earlyPrimitiveType) &&
-            (exportEvaluation.VertexInputs is null || exportEvaluation.VertexInputs.Count == 0) &&
-            !VertexProgramExportsParameters(exportState.Program) &&
-            GetInterpolatedAttributeCount(pixelState) != 0)
-        {
-            ReturnPooledEvaluationArrays(exportEvaluation);
-            ReturnPooledEvaluationArrays(pixelEvaluation);
-            error =
-                $"rect-list-no-param-exports ps_inputs={GetInterpolatedAttributeCount(pixelState)}";
-            TraceAgcShader(
-                $"agc.rect_list_skip es=0x{exportShaderAddress:X16} " +
-                $"ps=0x{pixelShaderAddress:X16} {error}");
-            return false;
-        }
-
         // Every bound color target the shader exports to. Deferred renderers
         // draw a multi-render-target G-buffer (up to eight slots) in one pass.
         // Fall back to slot 0 if we cannot match any export to a bound target.
@@ -7740,6 +7811,12 @@ public static partial class AgcExports
             pixelUserData[index] = pixelEvaluation.InitialScalarRegisters[index];
         }
 
+        var renderState = ApplyTransparentPremultipliedFillClear(
+            CreateRenderState(state.CxRegisters, renderTargets, pixelColorExportMasks),
+            textures,
+            vertexInputs,
+            pixelEvaluation.InitialScalarRegisters);
+
         draw = new TranslatedGuestDraw(
             exportShaderAddress,
             pixelShaderAddress,
@@ -7757,11 +7834,7 @@ public static partial class AgcExports
             renderTargets,
             DecodeDepthTarget(state.CxRegisters),
             guestTargets,
-            ApplyTransparentPremultipliedFillClear(
-                CreateRenderState(state.CxRegisters, renderTargets, pixelColorExportMasks),
-                textures,
-                vertexInputs,
-                pixelEvaluation.InitialScalarRegisters),
+            renderState,
             pixelUserData,
             state.CxRegisters.TryGetValue(CbBlend0Control, out var rawBlend) ? rawBlend : 0,
             state.CxRegisters.TryGetValue(
@@ -7775,7 +7848,15 @@ public static partial class AgcExports
             fullscreenClearColor.Red,
             fullscreenClearColor.Green,
             fullscreenClearColor.Blue,
-            fullscreenClearColor.Alpha);
+            fullscreenClearColor.Alpha,
+            IsDccFastClearDraw(
+                state.CxRegisters,
+                renderTargets,
+                textures,
+                vertexInputs,
+                renderState,
+                primitiveType,
+                vertexCount));
         return true;
     }
 
@@ -8052,6 +8133,113 @@ public static partial class AgcExports
         };
     }
 
+    /// <summary>
+    /// Recognises the covering quad a GFX10 driver issues to clear a
+    /// DCC-compressed colour target. There is no clear packet: the driver
+    /// programs CB_COLORn_CLEAR_WORD0/1 and draws a quad that the colour block
+    /// turns into DCC clear codes, discarding whatever the pixel shader
+    /// exported. Executing it as an ordinary draw writes the shaded output
+    /// instead, and because the blend it uses computes
+    /// <c>a &lt;- a_src + a_dst * (1 - a_src)</c> - fixed point 1 - the target's
+    /// alpha then climbs every frame and saturates.
+    ///
+    /// Restricted to clear-to-zero. The reset performed for a match clears the
+    /// attachment to zero, so a nonzero CLEAR_WORD would be cleared to the
+    /// wrong colour; those fall through and are drawn. Zero is zero under every
+    /// encoding the register can carry, so the pair needs no format handling.
+    ///
+    /// The clip-space test is load-bearing rather than belt-and-braces: fills
+    /// sharing the vertex count, topology and blend outnumber the clears by two
+    /// orders of magnitude and sit at coordinates well outside the frame.
+    /// </summary>
+    private const uint TriangleStripPrimitive = 6;
+
+    // A float32x3 vertex position stream (BUF_DATA_FORMAT_32_32_32 / FLOAT).
+    private const uint PositionDataFormat = 13;
+    private const uint PositionNumberFormat = 7;
+
+    private static bool IsDccFastClearDraw(
+        IReadOnlyDictionary<uint, uint> registers,
+        IReadOnlyList<RenderTargetDescriptor> renderTargets,
+        IReadOnlyList<TranslatedImageBinding> textures,
+        IReadOnlyList<Gen5VertexInputBinding> vertexInputs,
+        GuestRenderState renderState,
+        uint primitiveType,
+        uint vertexCount)
+    {
+        if (textures.Count != 0 ||
+            vertexCount != 4 ||
+            primitiveType != TriangleStripPrimitive ||
+            renderTargets.Count == 0 ||
+            renderState.Blends.Count == 0 ||
+            !renderState.Blends.All(IsTransparentPremultipliedFillBlend))
+        {
+            return false;
+        }
+
+        var slotStride = renderTargets[0].Slot * CbColorRegisterStride;
+        return registers.TryGetValue(CbColor0Info + slotStride, out var info) &&
+            (info & CbColorInfoDccEnableMask) != 0 &&
+            registers.TryGetValue(CbColor0ClearWord0 + slotStride, out var clearWord0) &&
+            registers.TryGetValue(CbColor0ClearWord1 + slotStride, out var clearWord1) &&
+            clearWord0 == 0 &&
+            clearWord1 == 0 &&
+            CoversClipSpace(vertexInputs, vertexCount);
+    }
+
+    /// <summary>
+    /// True when the draw's float32x3 position stream spans the full clip
+    /// rectangle, i.e. x and y both reach -1 and +1.
+    /// </summary>
+    private static bool CoversClipSpace(
+        IReadOnlyList<Gen5VertexInputBinding> vertexInputs,
+        uint vertexCount)
+    {
+        const float Tolerance = 0.001f;
+        foreach (var input in vertexInputs)
+        {
+            if (input.DataFormat != PositionDataFormat ||
+                input.NumberFormat != PositionNumberFormat)
+            {
+                continue;
+            }
+
+            var stride = input.Stride == 0 ? 12u : input.Stride;
+            var available = Math.Min(input.DataLength, input.Data.Length);
+            float minX = float.MaxValue, maxX = float.MinValue;
+            float minY = float.MaxValue, maxY = float.MinValue;
+            var seen = 0;
+            for (var vertex = 0u; vertex < vertexCount; vertex++)
+            {
+                var at = (int)(input.OffsetBytes + (vertex * stride));
+                if (at + 12 > available)
+                {
+                    break;
+                }
+
+                var position = input.Data.AsSpan(at);
+                var x = BitConverter.ToSingle(position);
+                var y = BitConverter.ToSingle(position[4..]);
+                if (!float.IsFinite(x) || !float.IsFinite(y))
+                {
+                    return false;
+                }
+
+                minX = Math.Min(minX, x);
+                maxX = Math.Max(maxX, x);
+                minY = Math.Min(minY, y);
+                maxY = Math.Max(maxY, y);
+                seen++;
+            }
+
+            return seen >= 3 &&
+                minX <= -1f + Tolerance && maxX >= 1f - Tolerance &&
+                minY <= -1f + Tolerance && maxY >= 1f - Tolerance;
+        }
+
+        return false;
+    }
+
     private static bool IsTransparentPremultipliedFillBlend(GuestBlendState blend) =>
         blend is
         {
@@ -8236,20 +8424,6 @@ public static partial class AgcExports
             ? (packedMasks >> (int)(target * 4)) & 0xFu
             : 0;
 
-    private static bool VertexProgramExportsParameters(Gen5ShaderProgram program)
-    {
-        foreach (var instruction in program.Instructions)
-        {
-            if (instruction.Control is Gen5ExportControl export &&
-                export.Target is >= 32 and < 64)
-            {
-                return true;
-            }
-        }
-
-        return false;
-    }
-
     private static uint GetInterpolatedAttributeCount(Gen5ShaderState state)
     {
         var maxAttribute = -1;
@@ -12512,13 +12686,16 @@ public static partial class AgcExports
             // GTA V Enhanced HS headers start at RSRC1/RSRC2 (0x10A/0x10B) and
             // omit PGM_LO/HI from the default table. Still succeed: the code VA
             // lives at ShaderCodeOffset and later binder paths republish it.
-            if (shaderType == HsFrontShaderType && firstLo is SpiShaderPgmRsrc1Hs or SpiShaderPgmLoHs)
+            // GS front headers can likewise start at RSRC1_GS (0x8A) instead of
+            // PGM_LO_GS (0x88) - same deal, skip the patch here.
+            if ((shaderType == HsFrontShaderType && firstLo is SpiShaderPgmRsrc1Hs or SpiShaderPgmLoHs) ||
+                (shaderType == GsFrontShaderType && firstLo is SpiShaderPgmRsrc1Gs or SpiShaderPgmLoGs))
             {
                 TraceCreateShader(
                     0,
                     headerAddress,
                     codeAddress,
-                    $"skip-pgm-patch type={HsFrontShaderType} first_lo=0x{firstLo:X8}");
+                    $"skip-pgm-patch type={shaderType} first_lo=0x{firstLo:X8}");
                 return true;
             }
 
@@ -12673,9 +12850,6 @@ public static partial class AgcExports
     private static bool IsEsGeometryShaderType(byte shaderType) =>
         shaderType is GsShaderType or GsBackShaderType;
 
-    private static bool IsRectListPrimitive(uint primitiveType) =>
-        AgcPrimitiveHelpers.IsRectListPrimitive(primitiveType);
-
     private static int SetIndirectPatchAddress(CpuContext ctx, string registerSpace)
     {
         var commandAddress = ctx[CpuRegister.Rdi];

src/SharpEmu.Libs/VideoOut/VulkanVideoPresenter.cs

@@ -3,6 +3,7 @@
 
 using Silk.NET.Core;
 using Silk.NET.Core.Native;
+using System.Collections.Concurrent;
 using SharpEmu.HLE;
 using SharpEmu.Libs.Agc;
 using SharpEmu.Libs.Media;
@@ -1259,6 +1260,25 @@ internal static unsafe class VulkanVideoPresenter
         }
     }
 
+    private static readonly ConcurrentDictionary<ulong, byte> _pendingGuestColorClears = new();
+
+    /// <summary>
+    /// Clear a guest colour target to zero at its next render pass.
+    ///
+    /// Deliberately not <see cref="SubmitOffscreenColorClear"/>: that enqueues
+    /// a CmdClearColorImage which lands outside the render pass that follows
+    /// it, so a target cleared this way was still observed reading back its
+    /// previous contents. Dropping <c>Initialized</c> makes the render pass
+    /// itself clear via <see cref="AttachmentLoadOp.Clear"/>.
+    /// </summary>
+    internal static void RequestGuestColorClear(ulong address)
+    {
+        if (address != 0)
+        {
+            _pendingGuestColorClears[address] = 0;
+        }
+    }
+
     /// <summary>
     /// Apply a solid color clear to offscreen guest render targets without a
     /// graphics pipeline. Used for empty-SRT procedural clear draws that
@@ -4041,6 +4061,10 @@ internal static unsafe class VulkanVideoPresenter
                 "vkCreateDebugUtilsMessengerEXT");
         }
 
+
+        [ThreadStatic]
+        private static string? _pendingShaderModuleDumpPath;
+
         private static unsafe uint DebugCallback(
             DebugUtilsMessageSeverityFlagsEXT severity,
             DebugUtilsMessageTypeFlagsEXT type,
@@ -4055,6 +4079,24 @@ internal static unsafe class VulkanVideoPresenter
                 _ => "[VULKAN][INFO]",
             };
             Console.Error.WriteLine($"{prefix} {message}");
+
+
+            if (severity == DebugUtilsMessageSeverityFlagsEXT.ErrorBitExt &&
+                message is not null &&
+                message.Contains("vkCreateShaderModule", StringComparison.Ordinal))
+            {
+                var dumpPath = _pendingShaderModuleDumpPath;
+                var dumpHint = dumpPath is null
+                    ? "Set SHARPEMU_SHADER_SPIRV_DUMP_DIR to a directory to "
+                        + "capture every module's .spv bytes for offline "
+                        + "spirv-dis/spirv-val analysis."
+                    : $"Dumped module for this failure: {dumpPath}";
+
+                Console.Error.WriteLine(
+                    "[SHARPEMU][ERROR] A guest shader compiled to invalid SPIR-V."
+                    + "The shader module was created without an API-level error. {dumpHint}");
+            }
+
             return Vk.False;
         }
         private void CreateSurface()
@@ -6844,20 +6886,43 @@ internal static unsafe class VulkanVideoPresenter
             }
         }
 
+        private static int _shaderModuleDumpSequence;
+
         private ShaderModule CreateShaderModule(byte[] code)
         {
-            fixed (byte* codePointer = code)
+            string? dumpPath = null;
+            var dumpDirectory = Environment.GetEnvironmentVariable("SHARPEMU_SHADER_SPIRV_DUMP_DIR");
+            if (!string.IsNullOrWhiteSpace(dumpDirectory))
             {
-                var createInfo = new ShaderModuleCreateInfo
+                Directory.CreateDirectory(dumpDirectory);
+
+                var sequence = Interlocked.Increment(ref _shaderModuleDumpSequence);
+                dumpPath = Path.Combine(dumpDirectory, $"{sequence:D4}.spv");
+                File.WriteAllBytes(dumpPath, code);
+            
+                _pendingShaderModuleDumpPath = dumpPath;
+            }
+
+            
+            try
+            {
+                fixed (byte* codePointer = code)
                 {
-                    SType = StructureType.ShaderModuleCreateInfo,
-                    CodeSize = (nuint)code.Length,
-                    PCode = (uint*)codePointer,
-                };
-                Check(
-                    _vk.CreateShaderModule(_device, &createInfo, null, out var module),
-                    "vkCreateShaderModule");
-                return module;
+                    var createInfo = new ShaderModuleCreateInfo
+                    {
+                        SType = StructureType.ShaderModuleCreateInfo,
+                        CodeSize = (nuint)code.Length,
+                        PCode = (uint*)codePointer,
+                    };
+                    Check(
+                        _vk.CreateShaderModule(_device, &createInfo, null, out var module),
+                        "vkCreateShaderModule");
+                    return module;
+                }
+            }
+            finally
+            {
+                _pendingShaderModuleDumpPath = null;
             }
         }
 
@@ -12367,6 +12432,17 @@ internal static unsafe class VulkanVideoPresenter
                 // format could later be replayed inside a render pass of the
                 // other identity.
                 formats[index] = targets[index].Format;
+
+                // Guest colour attachments load their previous contents on
+                // every pass after the first, so nothing resets one until the
+                // guest clears it. Consume a pending clear here, before the
+                // render pass is built, so the pass uses LoadOp.Clear.
+                if (work.Targets[index].Address != 0 &&
+                    _pendingGuestColorClears.TryRemove(work.Targets[index].Address, out _))
+                {
+                    targets[index].Initialized = false;
+                }
+
                 if (work.Targets[index].Address != 0 &&
                     TakeGuestImageInitialData(work.Targets[index].Address) is { } initialData &&
                     !targets[index].Initialized &&

src/SharpEmu.ShaderCompiler.Vulkan/Gen5SpirvTranslator.cs

@@ -712,6 +712,8 @@ public static partial class Gen5SpirvTranslator
             if (UsesSubgroupOperations())
             {
                 _module.AddCapability(SpirvCapability.GroupNonUniform);
+                _module.AddCapability(SpirvCapability.GroupNonUniformBallot);
+
                 if (UsesSubgroupShuffle())
                 {
                     _module.AddCapability(SpirvCapability.GroupNonUniformShuffle);
@@ -722,10 +724,6 @@ public static partial class Gen5SpirvTranslator
                     _module.AddCapability(SpirvCapability.GroupNonUniformVote);
                 }
 
-                if (UsesSubgroupBroadcast() || UsesWaveControl())
-                {
-                    _module.AddCapability(SpirvCapability.GroupNonUniformBallot);
-                }
             }
 
             _glsl = _module.ImportExtInst("GLSL.std.450");
@@ -1803,13 +1801,16 @@ public static partial class Gen5SpirvTranslator
 
             if (instruction.Opcode == "SBarrier")
             {
-                var workgroup = UInt(2);
-                var semantics = UInt(0x108);
-                _module.AddStatement(
-                    SpirvOp.ControlBarrier,
-                    workgroup,
-                    workgroup,
-                    semantics);
+                if (_stage == Gen5SpirvStage.Compute)
+                {
+                    var workgroup = UInt(2);
+                    var semantics = UInt(0x108);
+                    _module.AddStatement(
+                        SpirvOp.ControlBarrier,
+                        workgroup,
+                        workgroup,
+                        semantics);
+                }
                 return true;
             }
 

tests/SharpEmu.Libs.Tests/Agc/AgcContextRegisterTests.cs

@@ -0,0 +1,215 @@
+// Copyright (C) 2026 SharpEmu Emulator Project
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+using System.Buffers.Binary;
+using SharpEmu.HLE;
+using SharpEmu.Libs.Agc;
+using Xunit;
+
+namespace SharpEmu.Libs.Tests.Agc;
+
+/// <summary>
+/// Coverage for the graphics context-register path in the PM4 parser. Draw
+/// translation reads render state out of this dictionary (CB_TARGET_MASK
+/// decides whether a draw writes alpha, CB_COLOR_CONTROL decides what the draw
+/// means), so a write that lands under the wrong key, or fails to overwrite an
+/// earlier one, silently changes what every later draw does. These drive real
+/// PM4 packets through the public submit export and assert what the parser
+/// retained.
+/// </summary>
+public sealed class AgcContextRegisterTests
+{
+    private const ulong BaseAddress = 0x2_0000_0000;
+    private const ulong SubmitPacketAddress = BaseAddress + 0x40;
+    private const ulong CommandAddress = BaseAddress + 0x200;
+    private const ulong IndirectTableAddress = BaseAddress + 0x600;
+
+    private const uint ItNop = 0x10;
+    private const uint ItSetContextReg = 0x69;
+    private const uint RCxRegsIndirect = 0x12;
+    private const uint CbTargetMask = 0x8E;
+    private const uint CbColorControl = 0x202;
+
+    // PM4 type-3 header: 0xC0000000 | ((dwords - 2) << 16) | (opcode << 8), with the
+    // NOP sub-register in bits 2..7 — the parser reads it as (header >> 2) & 0x3F.
+    private static uint Pm4Header(uint dwords, uint opcode, uint register = 0) =>
+        0xC000_0000u | ((dwords - 2) << 16) | (opcode << 8) | ((register & 0x3Fu) << 2);
+
+    [Fact]
+    public void SetContextRegRetainsTargetMask()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteDwords(
+            memory,
+            CommandAddress,
+            Pm4Header(3, ItSetContextReg),
+            CbTargetMask,
+            0x0000_0007u);
+        Submit(ctx, memory, dwordCount: 3);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsContextRegisterForTests(ctx, CbTargetMask, out var value));
+        Assert.Equal(0x0000_0007u, value);
+    }
+
+    /// <summary>
+    /// The indirect form carries (offset, value) pairs out of guest memory
+    /// rather than inline dwords, so an offset-encoding mismatch here would
+    /// store the register under a key no reader looks at.
+    /// </summary>
+    [Fact]
+    public void IndirectRegisterWriteRetainsTargetMask()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectRegisterCommand(memory, (CbTargetMask, 0xFFFF_FFFFu));
+        Submit(ctx, memory, dwordCount: 4);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsContextRegisterForTests(ctx, CbTargetMask, out var value));
+        Assert.Equal(0xFFFF_FFFFu, value);
+    }
+
+    /// <summary>
+    /// Context registers persist across submissions on hardware until something
+    /// clears them, so a mask written in one submission has to still be there
+    /// for a draw in the next.
+    /// </summary>
+    [Fact]
+    public void TargetMaskSurvivesASecondSubmission()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectRegisterCommand(memory, (CbTargetMask, 0x8888_8888u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        // A second, unrelated submission: a bare NOP that touches no registers.
+        WriteDwords(memory, CommandAddress, Pm4Header(2, ItNop), 0);
+        Submit(ctx, memory, dwordCount: 2);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsContextRegisterForTests(ctx, CbTargetMask, out var value));
+        Assert.Equal(0x8888_8888u, value);
+    }
+
+    /// <summary>
+    /// Both encodings must land on the same key, or a title that sets the
+    /// register one way and a reader that expects the other silently disagree.
+    /// </summary>
+    [Fact]
+    public void DirectAndIndirectWritesShareOneKey()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteDwords(
+            memory,
+            CommandAddress,
+            Pm4Header(3, ItSetContextReg),
+            CbTargetMask,
+            0x0000_0007u);
+        Submit(ctx, memory, dwordCount: 3);
+
+        WriteIndirectRegisterCommand(memory, (CbTargetMask, 0x0000_000Fu));
+        Submit(ctx, memory, dwordCount: 4);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsContextRegisterForTests(ctx, CbTargetMask, out var value));
+        Assert.Equal(0x0000_000Fu, value);
+    }
+
+    /// <summary>
+    /// CB_COLOR_CONTROL (0x202) MODE bits [6:4] give Normal=1,
+    /// EliminateFastClear=2, Resolve=3, FmaskDecompress=5, DccDecompress=6. The
+    /// value has to survive the parser intact, ROP3 bits and all, because the
+    /// mode decides whether a draw shades or resolves.
+    /// </summary>
+    [Theory]
+    [InlineData(0x0000_0010u, 1u)] // Normal
+    [InlineData(0x0000_0020u, 2u)] // EliminateFastClear
+    [InlineData(0x00CC_0060u, 6u)] // DccDecompress, with ROP3=0xCC alongside
+    public void ColorControlRetainsMode(uint written, uint expectedMode)
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectRegisterCommand(memory, (CbColorControl, written));
+        Submit(ctx, memory, dwordCount: 4);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsContextRegisterForTests(ctx, CbColorControl, out var value));
+        Assert.Equal(written, value);
+        Assert.Equal(expectedMode, (value >> 4) & 0x7u);
+    }
+
+    /// <summary>
+    /// A later write must win. If the parser kept the first value, a draw that
+    /// sets EliminateFastClear after an earlier Normal would still read Normal
+    /// and the clear would be silently dropped.
+    /// </summary>
+    [Fact]
+    public void ColorControlLaterWriteOverwritesEarlier()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectRegisterCommand(memory, (CbColorControl, 0x00CC_0010u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        WriteIndirectRegisterCommand(memory, (CbColorControl, 0x00CC_0020u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsContextRegisterForTests(ctx, CbColorControl, out var value));
+        Assert.Equal(0x00CC_0020u, value);
+        Assert.Equal(2u, (value >> 4) & 0x7u);
+    }
+
+    private static void WriteIndirectRegisterCommand(
+        FakeCpuMemory memory,
+        params (uint Offset, uint Value)[] registers)
+    {
+        WriteDwords(
+            memory,
+            CommandAddress,
+            Pm4Header(4, ItNop, RCxRegsIndirect),
+            (uint)registers.Length,
+            (uint)(IndirectTableAddress & 0xFFFF_FFFFu),
+            (uint)(IndirectTableAddress >> 32));
+
+        for (var index = 0; index < registers.Length; index++)
+        {
+            var entry = IndirectTableAddress + ((ulong)index * 8);
+            WriteUInt32(memory, entry, registers[index].Offset);
+            WriteUInt32(memory, entry + 4, registers[index].Value);
+        }
+    }
+
+    private static void Submit(CpuContext ctx, FakeCpuMemory memory, uint dwordCount)
+    {
+        WriteUInt64(memory, SubmitPacketAddress, CommandAddress);
+        WriteUInt32(memory, SubmitPacketAddress + 8, dwordCount);
+        ctx[CpuRegister.Rdi] = SubmitPacketAddress;
+        AgcExports.DriverSubmitDcb(ctx);
+    }
+
+    private static CpuContext CreateContext(out FakeCpuMemory memory)
+    {
+        memory = new FakeCpuMemory(BaseAddress, 0x1000);
+        return new CpuContext(memory, Generation.Gen5);
+    }
+
+    private static void WriteDwords(FakeCpuMemory memory, ulong address, params uint[] values)
+    {
+        for (var index = 0; index < values.Length; index++)
+        {
+            WriteUInt32(memory, address + ((ulong)index * sizeof(uint)), values[index]);
+        }
+    }
+
+    private static void WriteUInt32(FakeCpuMemory memory, ulong address, uint value)
+    {
+        Span<byte> buffer = stackalloc byte[sizeof(uint)];
+        BinaryPrimitives.WriteUInt32LittleEndian(buffer, value);
+        Assert.True(memory.TryWrite(address, buffer));
+    }
+
+    private static void WriteUInt64(FakeCpuMemory memory, ulong address, ulong value)
+    {
+        Span<byte> buffer = stackalloc byte[sizeof(ulong)];
+        BinaryPrimitives.WriteUInt64LittleEndian(buffer, value);
+        Assert.True(memory.TryWrite(address, buffer));
+    }
+}

tests/SharpEmu.Libs.Tests/Agc/AgcShaderStageRegisterTests.cs

@@ -0,0 +1,232 @@
+// Copyright (C) 2026 SharpEmu Emulator Project
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+using System.Buffers.Binary;
+using SharpEmu.HLE;
+using SharpEmu.Libs.Agc;
+using Xunit;
+
+namespace SharpEmu.Libs.Tests.Agc;
+
+/// <summary>
+/// Coverage for the SH-register path in the PM4 parser. A draw resolves its
+/// vertex stage from SPI_SHADER_PGM_LO_ES/HI_ES and its pixel stage from
+/// SPI_SHADER_PGM_LO_PS/HI_PS, both out of this dictionary, so a key that is
+/// dropped or written under a different encoding pairs a current pixel shader
+/// with a stale vertex shader — a failure that produces plausible-looking
+/// garbage rather than an error. These drive real PM4 packets through the
+/// public submit export and assert what the parser retained.
+/// </summary>
+public sealed class AgcShaderStageRegisterTests
+{
+    private const ulong BaseAddress = 0x2_0000_0000;
+    private const ulong SubmitPacketAddress = BaseAddress + 0x40;
+    private const ulong CommandAddress = BaseAddress + 0x200;
+    private const ulong IndirectTableAddress = BaseAddress + 0x600;
+
+    private const uint ItNop = 0x10;
+    private const uint ItSetShReg = 0x76;
+    private const uint RShRegsIndirect = 0x11;
+
+    // SH register offsets. ES is the vertex stage on GFX10 — the standalone
+    // PGM_LO/HI_GS pair is dead post-GCN and the merged ES/GS stage is addressed
+    // through ES.
+    private const uint SpiShaderPgmLoPs = 0x8;
+    private const uint SpiShaderPgmLoEs = 0xC8;
+    private const uint SpiShaderPgmHiEs = 0xC9;
+
+    private static uint Pm4Header(uint dwords, uint opcode, uint register = 0) =>
+        0xC000_0000u | ((dwords - 2) << 16) | (opcode << 8) | ((register & 0x3Fu) << 2);
+
+    /// <summary>
+    /// The baseline: a direct SET_SH_REG write of the vertex stage address has
+    /// to be readable afterwards. If this fails, nothing downstream can pair
+    /// shaders correctly.
+    /// </summary>
+    [Fact]
+    public void SetShRegRetainsExportShaderAddress()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteDwords(
+            memory,
+            CommandAddress,
+            Pm4Header(3, ItSetShReg),
+            SpiShaderPgmLoEs,
+            0x0044_8582u);
+        Submit(ctx, memory, dwordCount: 3);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsShRegisterForTests(ctx, SpiShaderPgmLoEs, out var value));
+        Assert.Equal(0x0044_8582u, value);
+    }
+
+    /// <summary>
+    /// The indirect encoding must land on the same keys as the direct one. A
+    /// mismatch would store the stage address where the draw never reads it,
+    /// leaving the draw to see whatever a previous submission left behind.
+    /// </summary>
+    [Fact]
+    public void IndirectShRegisterWriteRetainsExportShaderAddress()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectShRegisterCommand(memory, (SpiShaderPgmLoEs, 0x0044_8DD1u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsShRegisterForTests(ctx, SpiShaderPgmLoEs, out var value));
+        Assert.Equal(0x0044_8DD1u, value);
+    }
+
+    /// <summary>
+    /// Both stages written in one submission must both read back as written. If
+    /// the vertex stage kept an older value while the pixel stage updated, every
+    /// draw after it would be mis-paired.
+    /// </summary>
+    [Fact]
+    public void BothStagesUpdateTogetherWithinOneSubmission()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectShRegisterCommand(
+            memory,
+            (SpiShaderPgmLoEs, 0x0080_2933u),
+            (SpiShaderPgmLoPs, 0x0044_858Au));
+        Submit(ctx, memory, dwordCount: 4);
+
+        WriteIndirectShRegisterCommand(
+            memory,
+            (SpiShaderPgmLoEs, 0x0044_8581u),
+            (SpiShaderPgmLoPs, 0x0044_8719u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsShRegisterForTests(ctx, SpiShaderPgmLoEs, out var es));
+        Assert.True(
+            AgcExports.TryGetGraphicsShRegisterForTests(ctx, SpiShaderPgmLoPs, out var ps));
+        Assert.Equal(0x0044_8581u, es);
+        Assert.Equal(0x0044_8719u, ps);
+    }
+
+    /// <summary>
+    /// Updating only the pixel stage must leave the vertex stage at its previous
+    /// value rather than dropping the key, or the draw falls back to whatever
+    /// default the resolver finds.
+    /// </summary>
+    [Fact]
+    public void PixelStageUpdateLeavesExportStageIntact()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectShRegisterCommand(memory, (SpiShaderPgmLoEs, 0x0044_8582u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        WriteIndirectShRegisterCommand(memory, (SpiShaderPgmLoPs, 0x0044_858Au));
+        Submit(ctx, memory, dwordCount: 4);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsShRegisterForTests(ctx, SpiShaderPgmLoEs, out var es));
+        Assert.Equal(0x0044_8582u, es);
+    }
+
+    /// <summary>
+    /// Stage addresses are 64-bit: LO carries bits 39:8 and HI the top bits, and
+    /// the draw combines them. A HI retained from an earlier shader while LO
+    /// updates resolves to a splice of two different programs.
+    /// </summary>
+    [Fact]
+    public void HighAndLowHalvesUpdateTogether()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectShRegisterCommand(
+            memory,
+            (SpiShaderPgmLoEs, 0x0080_2933u),
+            (SpiShaderPgmHiEs, 0x0000_0008u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        WriteIndirectShRegisterCommand(
+            memory,
+            (SpiShaderPgmLoEs, 0x0044_8582u),
+            (SpiShaderPgmHiEs, 0x0000_0004u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsShRegisterForTests(ctx, SpiShaderPgmLoEs, out var lo));
+        Assert.True(
+            AgcExports.TryGetGraphicsShRegisterForTests(ctx, SpiShaderPgmHiEs, out var hi));
+        Assert.Equal(0x0044_8582u, lo);
+        Assert.Equal(0x0000_0004u, hi);
+    }
+
+    /// <summary>
+    /// SH registers persist across submissions on hardware. A stage address set
+    /// in one submission must still be there for a draw in the next.
+    /// </summary>
+    [Fact]
+    public void ExportShaderAddressSurvivesASecondSubmission()
+    {
+        var ctx = CreateContext(out var memory);
+        WriteIndirectShRegisterCommand(memory, (SpiShaderPgmLoEs, 0x0044_8583u));
+        Submit(ctx, memory, dwordCount: 4);
+
+        WriteDwords(memory, CommandAddress, Pm4Header(2, ItNop), 0);
+        Submit(ctx, memory, dwordCount: 2);
+
+        Assert.True(
+            AgcExports.TryGetGraphicsShRegisterForTests(ctx, SpiShaderPgmLoEs, out var value));
+        Assert.Equal(0x0044_8583u, value);
+    }
+
+    private static void WriteIndirectShRegisterCommand(
+        FakeCpuMemory memory,
+        params (uint Offset, uint Value)[] registers)
+    {
+        WriteDwords(
+            memory,
+            CommandAddress,
+            Pm4Header(4, ItNop, RShRegsIndirect),
+            (uint)registers.Length,
+            (uint)(IndirectTableAddress & 0xFFFF_FFFFu),
+            (uint)(IndirectTableAddress >> 32));
+
+        for (var index = 0; index < registers.Length; index++)
+        {
+            var entry = IndirectTableAddress + ((ulong)index * 8);
+            WriteUInt32(memory, entry, registers[index].Offset);
+            WriteUInt32(memory, entry + 4, registers[index].Value);
+        }
+    }
+
+    private static void Submit(CpuContext ctx, FakeCpuMemory memory, uint dwordCount)
+    {
+        WriteUInt64(memory, SubmitPacketAddress, CommandAddress);
+        WriteUInt32(memory, SubmitPacketAddress + 8, dwordCount);
+        ctx[CpuRegister.Rdi] = SubmitPacketAddress;
+        AgcExports.DriverSubmitDcb(ctx);
+    }
+
+    private static CpuContext CreateContext(out FakeCpuMemory memory)
+    {
+        memory = new FakeCpuMemory(BaseAddress, 0x1000);
+        return new CpuContext(memory, Generation.Gen5);
+    }
+
+    private static void WriteDwords(FakeCpuMemory memory, ulong address, params uint[] values)
+    {
+        for (var index = 0; index < values.Length; index++)
+        {
+            WriteUInt32(memory, address + ((ulong)index * sizeof(uint)), values[index]);
+        }
+    }
+
+    private static void WriteUInt32(FakeCpuMemory memory, ulong address, uint value)
+    {
+        Span<byte> buffer = stackalloc byte[sizeof(uint)];
+        BinaryPrimitives.WriteUInt32LittleEndian(buffer, value);
+        Assert.True(memory.TryWrite(address, buffer));
+    }
+
+    private static void WriteUInt64(FakeCpuMemory memory, ulong address, ulong value)
+    {
+        Span<byte> buffer = stackalloc byte[sizeof(ulong)];
+        BinaryPrimitives.WriteUInt64LittleEndian(buffer, value);
+        Assert.True(memory.TryWrite(address, buffer));
+    }
+}