gpu: Refactor command and swap buffers interface for asynch.
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@@ -36,7 +36,7 @@ void nvdisp_disp0::flip(u32 buffer_handle, u32 offset, u32 format, u32 width, u3
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auto& instance = Core::System::GetInstance();
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instance.GetPerfStats().EndGameFrame();
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instance.Renderer().SwapBuffers(framebuffer);
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instance.GPU().SwapBuffers(framebuffer);
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}
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} // namespace Service::Nvidia::Devices
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@@ -136,16 +136,6 @@ u32 nvhost_gpu::AllocateObjectContext(const std::vector<u8>& input, std::vector<
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return 0;
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}
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static void PushGPUEntries(Tegra::CommandList&& entries) {
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if (entries.empty()) {
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return;
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}
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auto& dma_pusher{Core::System::GetInstance().GPU().DmaPusher()};
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dma_pusher.Push(std::move(entries));
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dma_pusher.DispatchCalls();
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}
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u32 nvhost_gpu::SubmitGPFIFO(const std::vector<u8>& input, std::vector<u8>& output) {
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if (input.size() < sizeof(IoctlSubmitGpfifo)) {
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UNIMPLEMENTED();
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@@ -163,7 +153,7 @@ u32 nvhost_gpu::SubmitGPFIFO(const std::vector<u8>& input, std::vector<u8>& outp
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std::memcpy(entries.data(), &input[sizeof(IoctlSubmitGpfifo)],
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params.num_entries * sizeof(Tegra::CommandListHeader));
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PushGPUEntries(std::move(entries));
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Core::System::GetInstance().GPU().PushGPUEntries(std::move(entries));
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params.fence_out.id = 0;
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params.fence_out.value = 0;
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@@ -184,7 +174,7 @@ u32 nvhost_gpu::KickoffPB(const std::vector<u8>& input, std::vector<u8>& output)
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Memory::ReadBlock(params.address, entries.data(),
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params.num_entries * sizeof(Tegra::CommandListHeader));
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PushGPUEntries(std::move(entries));
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Core::System::GetInstance().GPU().PushGPUEntries(std::move(entries));
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params.fence_out.id = 0;
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params.fence_out.value = 0;
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@@ -141,7 +141,7 @@ void NVFlinger::Compose() {
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// There was no queued buffer to draw, render previous frame
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system_instance.GetPerfStats().EndGameFrame();
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system_instance.Renderer().SwapBuffers({});
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system_instance.GPU().SwapBuffers({});
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continue;
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}
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@@ -17,6 +17,13 @@ DmaPusher::~DmaPusher() = default;
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MICROPROFILE_DEFINE(DispatchCalls, "GPU", "Execute command buffer", MP_RGB(128, 128, 192));
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void DmaPusher::QueuePendingCalls() {
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for (auto& entry : dma_writebuffer) {
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dma_readbuffer.push(std::move(entry));
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}
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dma_writebuffer.clear();
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}
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void DmaPusher::DispatchCalls() {
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MICROPROFILE_SCOPE(DispatchCalls);
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@@ -89,9 +96,9 @@ bool DmaPusher::Step() {
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break;
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}
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}
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} else if (ib_enable && !dma_pushbuffer.empty()) {
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} else if (ib_enable && !dma_readbuffer.empty()) {
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// Current pushbuffer empty, but we have more IB entries to read
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const CommandList& command_list{dma_pushbuffer.front()};
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const CommandList& command_list{dma_readbuffer.front()};
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const CommandListHeader& command_list_header{command_list[dma_pushbuffer_subindex++]};
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dma_get = command_list_header.addr;
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dma_put = dma_get + command_list_header.size * sizeof(u32);
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@@ -99,7 +106,7 @@ bool DmaPusher::Step() {
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if (dma_pushbuffer_subindex >= command_list.size()) {
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// We've gone through the current list, remove it from the queue
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dma_pushbuffer.pop();
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dma_readbuffer.pop();
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dma_pushbuffer_subindex = 0;
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}
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} else {
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@@ -61,9 +61,10 @@ public:
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~DmaPusher();
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void Push(CommandList&& entries) {
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dma_pushbuffer.push(std::move(entries));
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dma_writebuffer.push_back(std::move(entries));
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}
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void QueuePendingCalls();
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void DispatchCalls();
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private:
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@@ -75,8 +76,9 @@ private:
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GPU& gpu;
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std::queue<CommandList> dma_pushbuffer; ///< Queue of command lists to be processed
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std::size_t dma_pushbuffer_subindex{}; ///< Index within a command list within the pushbuffer
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std::vector<CommandList> dma_writebuffer;
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std::queue<CommandList> dma_readbuffer;
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std::size_t dma_pushbuffer_subindex{}; ///< Index within a command list within the pushbuffer
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struct DmaState {
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u32 method; ///< Current method
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@@ -61,6 +61,17 @@ const DmaPusher& GPU::DmaPusher() const {
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return *dma_pusher;
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}
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void GPU::PushGPUEntries(Tegra::CommandList&& entries) {
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dma_pusher->Push(std::move(entries));
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dma_pusher->QueuePendingCalls();
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dma_pusher->DispatchCalls();
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}
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void GPU::SwapBuffers(
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std::optional<std::reference_wrapper<const Tegra::FramebufferConfig>> framebuffer) {
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renderer.SwapBuffers(std::move(framebuffer));
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}
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u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
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ASSERT(format != RenderTargetFormat::NONE);
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@@ -156,6 +156,13 @@ public:
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/// Returns a const reference to the GPU DMA pusher.
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const Tegra::DmaPusher& DmaPusher() const;
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/// Push GPU command entries to be processed
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void PushGPUEntries(Tegra::CommandList&& entries);
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/// Swap buffers (render frame)
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void SwapBuffers(
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std::optional<std::reference_wrapper<const Tegra::FramebufferConfig>> framebuffer);
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private:
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std::unique_ptr<Tegra::DmaPusher> dma_pusher;
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std::unique_ptr<Tegra::MemoryManager> memory_manager;
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