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[AGC] Emit Gen5 v_sad_u32 (#138)

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Co-authored-by: Dafenx <196083014+Dafenxz0@users.noreply.github.com>
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Dafenx
2026-07-14 16:11:11 +02:00
committed by GitHub
parent e80f96ecf5
commit 61a97baf85
1 changed files with 12 additions and 0 deletions
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src/SharpEmu.Libs/Agc/Gen5SpirvTranslator.Alu.cs
+12
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@@ -601,6 +601,18 @@ internal static partial class Gen5SpirvTranslator
Ext(38, _uintType, high, right)); Ext(38, _uintType, high, right));
break; break;
} }
case "VSadU32":
{
var left = GetRawSource(instruction, 0);
var right = GetRawSource(instruction, 1);
var difference = _module.AddInstruction(
SpirvOp.ISub,
_uintType,
Ext(41, _uintType, left, right),
Ext(38, _uintType, left, right));
result = IAdd(difference, GetRawSource(instruction, 2));
break;
}
case "VMed3I32": case "VMed3I32":
{ {
var left = Bitcast(_intType, GetRawSource(instruction, 0)); var left = Bitcast(_intType, GetRawSource(instruction, 0));