mirror of
https://github.com/par274/sharpemu.git
synced 2026-07-31 23:19:44 +08:00
kuba
816ec4ad27
Ports the event-queue rework from the archived silent-hill-minimal branch (968e9606, 9e3abb12, 2be9cfbf, f157a115) onto current upstream. The equeue implementation had not been touched upstream since that branch forked, so none of it had landed. Behaviour fixed: - Per-waiter event reservation. A blocked waiter used to wake on "the queue has any pending event" (TryWake => HasPendingEvents) and then re-read the queue on resume, so a woken waiter could find the event already drained by another waiter and park again with the wake consumed. Events are now reserved to the waiter they are delivered to. - Level-triggered events are preserved instead of being cleared by an unrelated read; only events that declare clear-on-read reset their trigger state. - Queued interrupts are bound to the registration generation that produced them, so an event registered after a queue was reused cannot consume an interrupt raised for the previous registration. - Deleting an equeue now terminates its waiters instead of leaving them blocked on a handle that no longer resolves. - sceKernelTriggerUserEvent stores its third argument in the event's udata (0x18) rather than its data word (0x10). The guest reads it back with sceKernelGetEventUserData, which loads 0x18, so every triggered user event previously read back as 0. This matches the reference behaviour in shadPS4, where TriggerEvent takes udata and sceKernelGetEventUserData returns ev->udata. The upstream test asserting the data word is updated, since it encoded the inconsistency rather than the ABI. KernelPthreadState gains TryGetCurrentThreadIdentity and a new KernelSyncTraceFormatter carries the shared, opt-in diagnostic formatting the ported code calls; both are gated behind the existing trace flag and do no work when it is off. Tests: 662 pass, 0 fail (SharpEmu.Libs.Tests 588 -> 598).
541 lines
20 KiB
C#
541 lines
20 KiB
C#
// Copyright (C) 2026 SharpEmu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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using System.Buffers.Binary;
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using SharpEmu.HLE;
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using SharpEmu.Libs.Kernel;
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using Xunit;
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namespace SharpEmu.Libs.Tests.Agc;
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// The kernel event-queue registry is process-wide static state, and these tests assert over
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// every graphics registration in it, so they cannot run beside another suite that registers
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// graphics events.
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[CollectionDefinition(GraphicsEventQueueStateCollection.Name, DisableParallelization = true)]
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public sealed class GraphicsEventQueueStateCollection
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{
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public const string Name = "GraphicsEventQueueState";
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}
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// IT_EVENT_WRITE carries a 6-bit hardware EVENT_TYPE, but sceAgcDriverAddEqEvent registers the
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// listener with a guest-defined eventId. Those two values are not the same numbering scheme, so
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// exact ident matching never wakes anything (issue #173). TriggerRegisteredEventsByFilter wakes
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// every graphics registration instead.
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[Collection(GraphicsEventQueueStateCollection.Name)]
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public sealed class AgcEventQueueTests
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{
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private const ulong BaseAddress = 0x1_0000_0000;
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private const int MemorySize = 0x2000;
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[Fact]
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public void TriggerRegisteredEventsByFilter_DifferentIdentThanEventType_WakesGraphicsWaiter()
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{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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const ulong handleOutAddress = BaseAddress + 0x100;
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const ulong eventsAddress = BaseAddress + 0x200;
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const ulong outCountAddress = BaseAddress + 0x300;
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const ulong timeoutAddress = BaseAddress + 0x400;
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// Create an event queue.
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ctx[CpuRegister.Rdi] = handleOutAddress;
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var createResult = KernelEventQueueCompatExports.KernelCreateEqueue(ctx);
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Assert.Equal((int)OrbisGen2Result.ORBIS_GEN2_OK, createResult);
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var handle = ReadUInt64(memory, handleOutAddress);
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// Register a graphics event with eventId 0x20 (as Poppy Playtime does).
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const ulong registeredEventId = 0x20;
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const ulong userData = 0xDEAD_BEEF;
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var registered = KernelEventQueueCompatExports.RegisterEvent(
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handle,
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registeredEventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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userData);
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Assert.True(registered);
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// The command buffer fires EVENT_WRITE with eventType 0x07. This does not match 0x20.
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const ulong eventType = 0x07;
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var triggered = KernelEventQueueCompatExports.TriggerRegisteredEventsByFilter(
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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eventType);
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Assert.Equal(1, triggered);
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// Wait with timeout=0. The event is already pending, so this returns immediately.
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WriteUInt64(memory, timeoutAddress, 0);
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ctx[CpuRegister.Rdi] = handle;
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ctx[CpuRegister.Rsi] = eventsAddress;
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ctx[CpuRegister.Rdx] = 4;
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ctx[CpuRegister.Rcx] = outCountAddress;
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ctx[CpuRegister.R8] = timeoutAddress;
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var waitResult = KernelEventQueueCompatExports.KernelWaitEqueue(ctx);
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Assert.Equal((int)OrbisGen2Result.ORBIS_GEN2_OK, waitResult);
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Assert.Equal(1u, ReadUInt32(memory, outCountAddress));
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// Verify the queued event carries the registered ident and the event type as data.
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Assert.Equal(registeredEventId, ReadUInt64(memory, eventsAddress + 0x00));
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Assert.Equal(KernelEventQueueCompatExports.KernelEventFilterGraphics, ReadInt16(memory, eventsAddress + 0x08));
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Assert.Equal(
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KernelEventQueueCompatExports.KernelEventFlagClear,
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ReadUInt16(memory, eventsAddress + 0x0A));
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Assert.Equal(1u, ReadUInt32(memory, eventsAddress + 0x0C));
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Assert.Equal(eventType, ReadUInt64(memory, eventsAddress + 0x10));
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Assert.Equal(userData, ReadUInt64(memory, eventsAddress + 0x18));
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// Registrations live in process-wide static state, and a sibling test asserts that
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// no graphics registration exists at all. Drop this one instead of relying on
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// execution order.
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ctx[CpuRegister.Rdi] = handle;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelDeleteEqueue(ctx));
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}
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[Fact]
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public void TriggerRegisteredEventsByFilter_NoGraphicsRegistrations_ReturnsZero()
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{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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const ulong handleOutAddress = BaseAddress + 0x100;
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ctx[CpuRegister.Rdi] = handleOutAddress;
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var createResult = KernelEventQueueCompatExports.KernelCreateEqueue(ctx);
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Assert.Equal((int)OrbisGen2Result.ORBIS_GEN2_OK, createResult);
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var handle = ReadUInt64(memory, handleOutAddress);
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// Register a user event, not a graphics event.
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KernelEventQueueCompatExports.RegisterEvent(
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handle,
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0x1,
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KernelEventQueueCompatExports.KernelEventFilterUser,
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0);
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var triggered = KernelEventQueueCompatExports.TriggerRegisteredEventsByFilter(
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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0x07);
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Assert.Equal(0, triggered);
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}
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[Fact]
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public void CapturedCompletion_DoesNotWakeDeleteAndReAddGeneration()
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{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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var handle = CreateEqueue(ctx, memory, BaseAddress + 0x100);
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const ulong eventId = 0x20;
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Assert.True(KernelEventQueueCompatExports.RegisterEvent(
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handle,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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userData: 0x1111));
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var staleSnapshot =
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KernelEventQueueCompatExports.CaptureRegisteredEvents(
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memory,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics);
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Assert.Single(staleSnapshot.Targets);
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Assert.True(KernelEventQueueCompatExports.DeleteRegisteredEvent(
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handle,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics));
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Assert.True(KernelEventQueueCompatExports.RegisterEvent(
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handle,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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userData: 0x2222));
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var staleDelivery =
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KernelEventQueueCompatExports.TriggerCapturedEvents(
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staleSnapshot,
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eventId);
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Assert.Equal(0, staleDelivery.TriggeredCount);
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Assert.Equal(1, staleDelivery.StaleCount);
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Assert.False(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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handle,
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out _));
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var liveSnapshot =
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KernelEventQueueCompatExports.CaptureRegisteredEvents(
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memory,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics);
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var liveDelivery =
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KernelEventQueueCompatExports.TriggerCapturedEvents(
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liveSnapshot,
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eventId);
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Assert.Equal(1, liveDelivery.TriggeredCount);
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Assert.Equal(0, liveDelivery.StaleCount);
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Assert.True(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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handle,
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out var delivered));
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Assert.Equal(0x2222UL, delivered.UserData);
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DeleteEqueue(ctx, handle);
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}
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[Fact]
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public void CapturedCompletion_PreservesEachQueuesRegistrationGeneration()
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{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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var firstHandle = CreateEqueue(ctx, memory, BaseAddress + 0x100);
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var secondHandle = CreateEqueue(ctx, memory, BaseAddress + 0x108);
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const ulong eventId = 0x20;
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Assert.True(KernelEventQueueCompatExports.RegisterEvent(
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firstHandle,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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userData: 0xAAAA));
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Assert.True(KernelEventQueueCompatExports.RegisterEvent(
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secondHandle,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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userData: 0xBBBB));
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var snapshot = KernelEventQueueCompatExports.CaptureRegisteredEvents(
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memory,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics);
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Assert.Equal(2, snapshot.Targets.Length);
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Assert.True(KernelEventQueueCompatExports.DeleteRegisteredEvent(
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secondHandle,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics));
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var delivery = KernelEventQueueCompatExports.TriggerCapturedEvents(
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snapshot,
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eventId);
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Assert.Equal(1, delivery.TriggeredCount);
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Assert.Equal(1, delivery.StaleCount);
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Assert.True(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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firstHandle,
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out var delivered));
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Assert.Equal(0xAAAAUL, delivered.UserData);
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Assert.False(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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secondHandle,
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out _));
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DeleteEqueue(ctx, firstHandle);
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DeleteEqueue(ctx, secondHandle);
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}
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[Fact]
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public void CapturedCompletion_DoesNotWakeDeletedEqueue()
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{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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var handle = CreateEqueue(ctx, memory, BaseAddress + 0x100);
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Assert.True(KernelEventQueueCompatExports.RegisterEvent(
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handle,
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ident: 0,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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userData: 0));
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var snapshot = KernelEventQueueCompatExports.CaptureRegisteredEvents(
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memory,
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ident: 0,
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KernelEventQueueCompatExports.KernelEventFilterGraphics);
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DeleteEqueue(ctx, handle);
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var delivery = KernelEventQueueCompatExports.TriggerCapturedEvents(
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snapshot,
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data: 0);
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Assert.Equal(0, delivery.TriggeredCount);
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Assert.Equal(1, delivery.StaleCount);
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}
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[Fact]
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public void CapturedCompletion_IsScopedToCreatingRuntime()
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{
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var firstMemory = new FakeCpuMemory(BaseAddress, MemorySize);
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var secondMemory = new FakeCpuMemory(BaseAddress, MemorySize);
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var firstContext = new CpuContext(firstMemory, Generation.Gen5);
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var secondContext = new CpuContext(secondMemory, Generation.Gen5);
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var firstHandle = CreateEqueue(
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firstContext,
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firstMemory,
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BaseAddress + 0x100);
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var secondHandle = CreateEqueue(
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secondContext,
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secondMemory,
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BaseAddress + 0x100);
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const ulong eventId = 0x20;
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Assert.True(KernelEventQueueCompatExports.RegisterEvent(
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firstHandle,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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userData: 0x1111));
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Assert.True(KernelEventQueueCompatExports.RegisterEvent(
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secondHandle,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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userData: 0x2222));
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var snapshot = KernelEventQueueCompatExports.CaptureRegisteredEvents(
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firstMemory,
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eventId,
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KernelEventQueueCompatExports.KernelEventFilterGraphics);
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Assert.Single(snapshot.Targets);
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var delivery = KernelEventQueueCompatExports.TriggerCapturedEvents(
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snapshot,
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eventId);
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Assert.Equal(1, delivery.TriggeredCount);
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Assert.Equal(0, delivery.StaleCount);
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Assert.True(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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firstHandle,
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out var delivered));
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Assert.Equal(0x1111UL, delivered.UserData);
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Assert.False(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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secondHandle,
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out _));
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DeleteEqueue(firstContext, firstHandle);
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DeleteEqueue(secondContext, secondHandle);
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}
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[Fact]
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public void OnePendingEventCanBeReservedByOnlyOneWaiter()
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{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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const ulong handleOutAddress = BaseAddress + 0x100;
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ctx[CpuRegister.Rdi] = handleOutAddress;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelCreateEqueue(ctx));
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var handle = ReadUInt64(memory, handleOutAddress);
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Assert.True(KernelEventQueueCompatExports.EnqueueEvent(
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handle,
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new KernelEventQueueCompatExports.KernelQueuedEvent(
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7,
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KernelEventQueueCompatExports.KernelEventFilterGraphics,
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KernelEventQueueCompatExports.KernelEventFlagClear,
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1,
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0,
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0)));
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Assert.Equal(
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1,
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KernelEventQueueCompatExports.ReservePendingEventCountForTest(
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handle,
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eventCapacity: 1));
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Assert.Equal(
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0,
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KernelEventQueueCompatExports.ReservePendingEventCountForTest(
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handle,
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eventCapacity: 1));
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}
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[Fact]
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public void ZeroTimeoutWithNoEventReturnsWithoutHostWait()
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{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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const ulong handleOutAddress = BaseAddress + 0x100;
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const ulong eventsAddress = BaseAddress + 0x200;
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const ulong outCountAddress = BaseAddress + 0x300;
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const ulong timeoutAddress = BaseAddress + 0x400;
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ctx[CpuRegister.Rdi] = handleOutAddress;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelCreateEqueue(ctx));
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var handle = ReadUInt64(memory, handleOutAddress);
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WriteUInt64(memory, timeoutAddress, 0);
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ctx[CpuRegister.Rdi] = handle;
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ctx[CpuRegister.Rsi] = eventsAddress;
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ctx[CpuRegister.Rdx] = 1;
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ctx[CpuRegister.Rcx] = outCountAddress;
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ctx[CpuRegister.R8] = timeoutAddress;
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var result = KernelEventQueueCompatExports.KernelWaitEqueue(ctx);
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_ERROR_TIMED_OUT,
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result);
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Assert.Equal(0u, ReadUInt32(memory, outCountAddress));
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Assert.True(
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KernelEventQueueCompatExports.IsSynchronousPoll(
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timeoutAddress,
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timeoutUsec: 0));
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}
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[Fact]
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public void LevelUserEventPersistsButEdgeEventClears()
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{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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const ulong handleOutAddress = BaseAddress + 0x100;
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ctx[CpuRegister.Rdi] = handleOutAddress;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelCreateEqueue(ctx));
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var handle = ReadUInt64(memory, handleOutAddress);
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const ulong levelIdent = 0xA1;
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ctx[CpuRegister.Rdi] = handle;
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ctx[CpuRegister.Rsi] = levelIdent;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelAddUserEvent(ctx));
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ctx[CpuRegister.Rdx] = 0x1111;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelTriggerUserEvent(ctx));
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Assert.True(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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handle,
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out var firstLevel));
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Assert.True(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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handle,
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out var secondLevel));
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Assert.Equal((ushort)0, firstLevel.Flags);
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Assert.Equal(0x1111UL, firstLevel.UserData);
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Assert.Equal(firstLevel, secondLevel);
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ctx[CpuRegister.Rsi] = levelIdent;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelDeleteUserEvent(ctx));
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const ulong edgeIdent = 0xA2;
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ctx[CpuRegister.Rsi] = edgeIdent;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelAddUserEventEdge(ctx));
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ctx[CpuRegister.Rdx] = 0x2222;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelTriggerUserEvent(ctx));
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Assert.True(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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handle,
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out var edge));
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Assert.Equal(
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KernelEventQueueCompatExports.KernelEventFlagClear,
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edge.Flags);
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Assert.Equal(0x2222UL, edge.UserData);
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Assert.False(
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KernelEventQueueCompatExports.TryReservePendingEventForTest(
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handle,
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out _));
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ctx[CpuRegister.Rdi] = handle;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
|
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KernelEventQueueCompatExports.KernelDeleteEqueue(ctx));
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}
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|
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[Fact]
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public void DeletingLevelRegistrationClearsItsReadyState()
|
|
{
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var memory = new FakeCpuMemory(BaseAddress, MemorySize);
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var ctx = new CpuContext(memory, Generation.Gen5);
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const ulong handleOutAddress = BaseAddress + 0x100;
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ctx[CpuRegister.Rdi] = handleOutAddress;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
|
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KernelEventQueueCompatExports.KernelCreateEqueue(ctx));
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var handle = ReadUInt64(memory, handleOutAddress);
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ctx[CpuRegister.Rdi] = handle;
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ctx[CpuRegister.Rsi] = 0xB1;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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KernelEventQueueCompatExports.KernelAddUserEvent(ctx));
|
|
ctx[CpuRegister.Rdx] = 0x3333;
|
|
Assert.Equal(
|
|
(int)OrbisGen2Result.ORBIS_GEN2_OK,
|
|
KernelEventQueueCompatExports.KernelTriggerUserEvent(ctx));
|
|
Assert.Equal(
|
|
(int)OrbisGen2Result.ORBIS_GEN2_OK,
|
|
KernelEventQueueCompatExports.KernelDeleteUserEvent(ctx));
|
|
|
|
Assert.False(
|
|
KernelEventQueueCompatExports.TryReservePendingEventForTest(
|
|
handle,
|
|
out _));
|
|
|
|
ctx[CpuRegister.Rdi] = handle;
|
|
Assert.Equal(
|
|
(int)OrbisGen2Result.ORBIS_GEN2_OK,
|
|
KernelEventQueueCompatExports.KernelDeleteEqueue(ctx));
|
|
}
|
|
|
|
private static ulong ReadUInt64(FakeCpuMemory memory, ulong address)
|
|
{
|
|
Span<byte> buffer = stackalloc byte[8];
|
|
Assert.True(memory.TryRead(address, buffer));
|
|
return BinaryPrimitives.ReadUInt64LittleEndian(buffer);
|
|
}
|
|
|
|
private static uint ReadUInt32(FakeCpuMemory memory, ulong address)
|
|
{
|
|
Span<byte> buffer = stackalloc byte[4];
|
|
Assert.True(memory.TryRead(address, buffer));
|
|
return BinaryPrimitives.ReadUInt32LittleEndian(buffer);
|
|
}
|
|
|
|
private static ushort ReadUInt16(FakeCpuMemory memory, ulong address)
|
|
{
|
|
Span<byte> buffer = stackalloc byte[2];
|
|
Assert.True(memory.TryRead(address, buffer));
|
|
return BinaryPrimitives.ReadUInt16LittleEndian(buffer);
|
|
}
|
|
|
|
private static short ReadInt16(FakeCpuMemory memory, ulong address)
|
|
{
|
|
Span<byte> buffer = stackalloc byte[2];
|
|
Assert.True(memory.TryRead(address, buffer));
|
|
return BinaryPrimitives.ReadInt16LittleEndian(buffer);
|
|
}
|
|
|
|
private static void WriteUInt64(FakeCpuMemory memory, ulong address, ulong value)
|
|
{
|
|
Span<byte> buffer = stackalloc byte[8];
|
|
BinaryPrimitives.WriteUInt64LittleEndian(buffer, value);
|
|
Assert.True(memory.TryWrite(address, buffer));
|
|
}
|
|
|
|
private static ulong CreateEqueue(
|
|
CpuContext ctx,
|
|
FakeCpuMemory memory,
|
|
ulong handleOutAddress)
|
|
{
|
|
ctx[CpuRegister.Rdi] = handleOutAddress;
|
|
Assert.Equal(
|
|
(int)OrbisGen2Result.ORBIS_GEN2_OK,
|
|
KernelEventQueueCompatExports.KernelCreateEqueue(ctx));
|
|
return ReadUInt64(memory, handleOutAddress);
|
|
}
|
|
|
|
private static void DeleteEqueue(CpuContext ctx, ulong handle)
|
|
{
|
|
ctx[CpuRegister.Rdi] = handle;
|
|
Assert.Equal(
|
|
(int)OrbisGen2Result.ORBIS_GEN2_OK,
|
|
KernelEventQueueCompatExports.KernelDeleteEqueue(ctx));
|
|
}
|
|
}
|