mirror of
https://github.com/par274/sharpemu.git
synced 2026-07-30 22:49:53 +08:00
db4339f698
* fix(kernel): implement APR ResolveFilepathsWithPrefixToIdsAndFileSizes Resource streamers resolve relative paths against a shared prefix; without this HLE every call returned NOT_FOUND and assets never got real ids/sizes. * fix(remoteplay): stub Initialize and GetConnectionStatus as disconnected Titles probe Remote Play during pad/network bring-up; unresolved imports returned NOT_FOUND. Report initialized + disconnected so callers take the normal offline path. * fix(agc): accept Gen5 hull shaders that omit PGM_LO/HI in CreateShader Type-5 headers can start with RSRC1/RSRC2; rejecting them left null handles and Main Thread AVs. Scan the SH table and skip PGM patch when absent. Co-authored-by: Cursor <cursoragent@cursor.com> * fix(kernel): reject getdents on file fds and emit . / .. for empty dirs Returning rax=0 for non-directory or empty listings looked like EOF and let GTA treat the fd as a pointer (fiWriteAsyncDataWorker AV at 0xB1). * fix(hle): enable GuestImageWriteTracker CPU sync on Windows Windows previously hard-disabled the tracker, so CPU-written guest planes never marked dirty and host textures stayed empty. Arm pages with VirtualProtect, handle write AVs in VEH, and warm/test on VirtualAlloc memory so protect cannot poison the CRT heap. * fix(agc): skip CB metadata draws for EliminateFastClear/Fmask/DCC CB_COLOR_CONTROL modes 2/5/6 are colour-buffer metadata ops; applying the bound shader as a normal colour draw corrupts subsequent composites. Decode MODE from bits [6:4] and return before translate. * fix(agc): merge Prospero attrib-table formats onto IR vertex inputs IR-discovered BufferLoadFormat often keeps a stale float sharp format; patch DataFormat/offset from the AGC attrib table (semantic index), allow offen fetches, and map quirks 113/121 through NarrowVk for host vertex input. * fix(audio): harden AudioOut2 stack out-buffer writes against canary smash Titles that stack-allocate AudioOut2 outs next to the frame canary were corrupted by oversized or mistyped HLE writes; keep ContextPush pacing. * Revert "fix(memory): reserve only large regions (#608)" This reverts commit8f9456229a. * fix(gpu): decode Gen5 R16 and RG32 render-target formats * fix(audio): AudioOut2 host beds, deeper waveOut queue, AJM MP3 GTA V Enhanced routes intro/menu audio through AudioOut2 and FMOD's AJM MP3 path. Wire PortCreate/PortSetAttributes/ContextPush to dual host stereo streams, deepen WinMM queue to 128KiB, and decode AJM codec 0 with a stateful NLayer helper so menu music is not silent. * fix(agc): map PS interpolants via SPI_PS_INPUT_CNTL semantics Identity ATTR→param wiring ignored hardware remapping, so UI draws got wrong (or empty) interpolants. Pack CNTL from matched PS/GS semantics, thread it into Vulkan/Metal as Location/Flat, and fingerprint it in the graphics shader cache key. * fix(agc): rect-list/NGG strips, Index8 expand, and GE_INDX_OFFSET NGG single-rect UI needs triangle-strip expansion; Prospero Index8 must expand to host u16; glyphs need base vertex from GE_INDX_OFFSET. Skip param-less rect-lists instead of inventing colour draws. * fix(np): report GTA Story Mode addcont entitlements as owned NpEntitlementAccess was returning an empty add-on list, so GTA V Enhanced offered Buy Story Mode. Publish the installed license labels and stub premium-event registration so offline sessions take the owned path. * fix(cpu): prefer native workers for all guest entry stubs Route thread entry, continuation, and main entry through RunGuestEntryStub so guest stubs are not invoked above CLR-managed frames (UnmanagedCallersOnly FailFast). Keep requireNativeWorker for tbb_thead; other paths prefer workers with calli fallback. * fix(agc): implement Rewind/Jump writers and IT_REWIND waits GTA Subrender AVs came from AcbJumpGetSize / DcbRewind returning NOT_FOUND as packet sizes. Add IT_REWIND and INDIRECT_BUFFER writers, patch SetRewindState into the GPU wait registry, and nest-parse 4-dword jumps. * fix(gpu): use AddrLib ExactXor for Gen5 Standard256B (mode 1) Mode 5 already had Standard4K ExactXor; mode 1 still used the generic StandardSwizzle block table, which mis-detiles Gen5 UI atlases. * Revert "fix(cpu): prefer native workers for all guest entry stubs" This reverts commit31c4db0d38. * fix(memory): commit-first large maps; reserve only on failure Replace the #608 always-reserve-only exact-map path with allocate-first and lazy reserve fallback when a huge non-exec commit cannot be satisfied. Prime and widen GetPointer commit so the fallback path is safer for native walkers. Drops the need for a hard #608 revert. * [Agc] Implement fused shader half exports * fix(agc): accept optional hull state in CreatePrimState Port the CreatePrimState hull-optional path from #583 so fused HS pipelines (GTA) are not rejected with INVALID_ARGUMENT. Geometry-derived CX/UC writes are unchanged; hull is traced only. * fix(videoout): restore thread-safe VulkanHostBufferPool (#564) The6db095ewipe dropped CasualcoderDev's lock-ordering-safe pool. Concurrent Return/TryTake without the gate races after the first present and can hang the submit path. * Revert "fix(agc): implement Rewind/Jump writers and IT_REWIND waits" This reverts commitbec77bf083. * test(memory): align lazy-commit expectations with commit-first policy Fake hosts must reject Allocate so reserve-only paths still run, and GetPointer asserts the 32 MiB prime range including AlignUp spill. * diag(gpu): log guest-queue backlog breakdown under backpressure Rate-limit top work types and ordered debugName prefixes when the Vulkan guest work queue stalls, so North Yankton logs show acquire/label vs draw traffic instead of only VulkanOrderedGuestAction. * perf(agc): coalesce acquire flushes and batch non-DMA label wakes Flush pending ACQUIRE_MEM invalidation at draw/dispatch/dma/flip boundaries instead of before every packet, and complete release/write-data producers in the same ordered action so load paths enqueue far fewer VulkanOrderedGuestAction items. * perf(gpu): wait for ordered-action fences and keep draining sync On Windows/Linux, block briefly for queue-visibility fences instead of deferring the whole logical queue for the tick. Prefer ordered sync/flip heads under backlog pressure, and keep macOS non-blocking defer behavior. * perf(gpu): raise sync-item ceiling above payload guest-work cap Apply SHARPEMU_PENDING_GUEST_WORK_ITEMS mainly to compute/draw/image payload work, and allow a higher SHARPEMU_PENDING_GUEST_SYNC_ITEMS ceiling for zero-payload ordered actions and flip markers. Keep the byte budget as the RAM safety valve. * fix(gta): stub Voice ports and implement sceKernelCheckReachability Resolve North Yankton-path Voice Create/Delete/Connect/Disconnect/End NIDs and EnumerationThread reachability checks so leftover unresolved imports are not on the critical path. * diag(gta): arm flip/present/wait probes after North Audio Rate-limited load_progress TRACE for flip submit, ordered flip enqueue, present taken/not-taken, and GPU wait backlog so North Yankton freezes can be classified without full AGC tracing. * fix(ampr): restore sequential offset=-1 reads for streamer packs Re-wire PakDirectoryTracker into sceAmprAprCommandBufferReadFile (dropped in #216) so RAGE sequential pack reads no longer fail while the North Yankton UI keeps flipping. Also rate-limit CheckReachability miss paths for EnumerationThread diagnosis. * fix(hle/videoout): Windows GuestImage opt-in and keep GTA intro without sync Default the tracker off on Windows to avoid VirtualProtect thrash, gate AGC texel-copy skips on Enabled so guest Bink planes keep shipping pixels, and drain CPU-written images on the present thread when sync is opted in. * fix(videoout): probe guest content when tracker off so UI can skip copies Restores upload-known/texture-cache skips for Dead Cells menus, and uses a sparse guest-memory fingerprint when GuestImageWriteTracker is disabled so CPU-updated Bink planes still force texel copies for GTA intro. * fix(audio): keep 128KiB host queue AudioOut2-only Restore the default 32 KiB (~171 ms) PCM bed for classic AudioOut so titles like Dreaming Sarah stay in sync; only AudioOut2 opens the deeper queue needed for bursty FMOD Push on GTA. --------- Co-authored-by: samto6 <123419830+samto6@users.noreply.github.com>
279 lines
12 KiB
C#
279 lines
12 KiB
C#
// Copyright (C) 2026 SharpEmu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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using SharpEmu.Libs.Agc;
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using Xunit;
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namespace SharpEmu.Libs.Tests.Agc;
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// TryDetile's exact-XOR fast path (PS5 swizzle modes 1/5/9/24/27) factors the
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// AddrLib bit-interleave into independent per-column X and per-row Y terms so
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// the inner loop is one array load and one XOR instead of a 16-bit interleave.
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// These tests pin that the factored output stays byte-identical to the direct
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// AddrLib address equation.
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public sealed class GnmTilingDetileTests
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{
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// Independent re-derivation of the 64 KiB RB+ R_X equation (swizzle mode 27,
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// 2 bytes/element) straight from the address-bit table, so the tiled source
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// layout does not depend on TryDetile's own internal factoring.
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private static readonly (uint XMask, uint YMask)[] RbPlus64KRenderX2Bpp =
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[
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(0, 0), (1u << 0, 0), (1u << 1, 0), (1u << 2, 0),
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(0, 1u << 0), (0, 1u << 1), (0, 1u << 2), (1u << 3, 0),
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(1u << 7, (1u << 4) | (1u << 7)), (1u << 4, 1u << 4), (1u << 6, 1u << 5), (1u << 5, 1u << 6),
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(0, 1u << 3), (1u << 6, 0), (1u << 7, 1u << 7), (1u << 8, 1u << 6),
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];
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private static uint ReferenceOffset(uint x, uint y, (uint XMask, uint YMask)[] pattern)
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{
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uint offset = 0;
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for (var bit = 0; bit < pattern.Length; bit++)
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{
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var parity = (System.Numerics.BitOperations.PopCount(x & pattern[bit].XMask) +
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System.Numerics.BitOperations.PopCount(y & pattern[bit].YMask)) & 1;
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offset |= (uint)parity << bit;
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}
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return offset;
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}
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[Theory]
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[InlineData(384, 200)]
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[InlineData(768, 512)]
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public void TryDetile_ExactXorMode27_MatchesReferenceAddressEquation(
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int elementsWide,
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int elementsHigh)
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{
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const uint swizzleMode = 27; // 64 KiB RB+ R_X
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const int bytesPerElement = 2;
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const int blockBytes = 65536;
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// SquareBlockDimensions(32768 elements): 15 bits split 8/7, x favored.
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const int blockWidth = 256;
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const int blockHeight = 128;
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var blocksPerRow = (elementsWide + blockWidth - 1) / blockWidth;
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var blocksPerColumn = (elementsHigh + blockHeight - 1) / blockHeight;
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// Lay out a tiled source where each element stores its own linear index,
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// placed at the byte address the AddrLib equation dictates. The tiled
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// buffer is sized by padded whole blocks (block addressing overshoots the
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// linear extent). A correct detile must recover ascending linear indices.
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var tiled = new byte[blocksPerRow * blocksPerColumn * blockBytes];
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for (var y = 0; y < elementsHigh; y++)
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{
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for (var x = 0; x < elementsWide; x++)
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{
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var blockIndex = (long)(y / blockHeight) * blocksPerRow + (x / blockWidth);
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// The equation yields a byte offset within the block (bit 0 is
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// Zero at 2bpp, keeping element writes 2-byte aligned).
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var sourceByte = (int)(blockIndex * blockBytes +
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ReferenceOffset((uint)x, (uint)y, RbPlus64KRenderX2Bpp));
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var linearIndex = (ushort)(y * elementsWide + x);
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tiled[sourceByte] = (byte)linearIndex;
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tiled[sourceByte + 1] = (byte)(linearIndex >> 8);
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}
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}
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var linear = new byte[elementsWide * elementsHigh * bytesPerElement];
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var ok = GnmTiling.TryDetile(tiled, linear, swizzleMode, elementsWide, elementsHigh, bytesPerElement);
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Assert.True(ok);
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for (var i = 0; i < elementsWide * elementsHigh; i++)
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{
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var value = (ushort)(linear[i * 2] | (linear[i * 2 + 1] << 8));
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Assert.Equal((ushort)i, value);
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}
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}
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// Gen5 Standard256B (mode 1) uses the 8-bit AddrLib S equation, not the
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// generic StandardSwizzle bit-interleave. Pin that TryDetile recovers a
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// known linear fill placed with that equation.
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private static readonly (uint XMask, uint YMask)[] Standard256_1Bpp =
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[
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(1u << 0, 0), (1u << 1, 0), (1u << 2, 0), (1u << 3, 0),
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(0, 1u << 0), (0, 1u << 1), (0, 1u << 2), (0, 1u << 3),
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];
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[Theory]
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[InlineData(32, 32)]
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[InlineData(64, 48)]
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public void TryDetile_ExactXorMode1_MatchesReferenceAddressEquation(
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int elementsWide,
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int elementsHigh)
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{
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const uint swizzleMode = 1; // Standard256B
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const int bytesPerElement = 1;
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const int blockBytes = 256;
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const int blockWidth = 16;
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const int blockHeight = 16;
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var blocksPerRow = (elementsWide + blockWidth - 1) / blockWidth;
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var blocksPerColumn = (elementsHigh + blockHeight - 1) / blockHeight;
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var tiled = new byte[blocksPerRow * blocksPerColumn * blockBytes];
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for (var y = 0; y < elementsHigh; y++)
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{
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for (var x = 0; x < elementsWide; x++)
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{
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var blockIndex = (long)(y / blockHeight) * blocksPerRow + (x / blockWidth);
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var sourceByte = (int)(blockIndex * blockBytes +
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ReferenceOffset((uint)x, (uint)y, Standard256_1Bpp));
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tiled[sourceByte] = (byte)(y * elementsWide + x);
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}
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}
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var linear = new byte[elementsWide * elementsHigh * bytesPerElement];
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Assert.True(GnmTiling.TryDetile(tiled, linear, swizzleMode, elementsWide, elementsHigh, bytesPerElement));
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for (var i = 0; i < elementsWide * elementsHigh; i++)
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{
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Assert.Equal((byte)i, linear[i]);
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}
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}
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// GetDetileParams must reproduce TryDetile bit-for-bit: the CPU fallback and
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// the GPU compute kernel both consume these params, so a detile driven purely
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// by DetileParams (the shared addressing formula the kernel runs) must equal
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// the shipped CPU detile for every supported mode/bpp.
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[Theory]
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[InlineData(27u, 2, 384, 200)] // 64 KiB RB+ R_X (exact-XOR)
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[InlineData(27u, 4, 256, 256)] // 64 KiB RB+ R_X (exact-XOR)
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[InlineData(9u, 4, 300, 300)] // 64 KiB standard (exact-XOR)
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[InlineData(24u, 4, 128, 256)] // 64 KiB RB+ Z_X (exact-XOR)
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[InlineData(5u, 4, 200, 120)] // 4 KiB standard (exact-XOR)
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[InlineData(1u, 4, 64, 64)] // 256 B standard (exact-XOR)
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[InlineData(8u, 4, 128, 128)] // 64 KiB Z (block-table path)
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public void GetDetileParams_ReproducesTryDetile(uint mode, int bpp, int w, int h)
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{
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var p = GnmTiling.GetDetileParams(mode, bpp, w, h);
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Assert.True(p.IsSupported);
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// Whole-block tiled buffer (block addressing overshoots the linear extent),
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// filled with a deterministic non-trivial pattern.
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var blocksHigh = (h + p.BlockHeight - 1) / p.BlockHeight;
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var tiled = new byte[(long)p.BlocksPerRow * blocksHigh * p.BlockBytes];
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for (var i = 0; i < tiled.Length; i++)
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{
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tiled[i] = (byte)((i * 31 + 7) & 0xFF);
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}
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var expected = new byte[w * h * bpp];
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Assert.True(GnmTiling.TryDetile(tiled, expected, mode, w, h, bpp));
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var actual = DetileViaParams(tiled, p, w, h, bpp);
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Assert.Equal(expected, actual);
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}
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// The production GnmTiling.DetileWithParams (the active CPU fallback used by
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// the Metal path under default-on GPU detile) must equal TryDetile for every
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// supported mode/bpp — same DetileParams addressing, no re-derived swizzle.
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[Theory]
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[InlineData(27u, 2, 384, 200)]
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[InlineData(27u, 4, 256, 256)]
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[InlineData(9u, 4, 300, 300)]
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[InlineData(24u, 4, 128, 256)]
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[InlineData(5u, 4, 200, 120)]
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[InlineData(8u, 4, 128, 128)]
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[InlineData(1u, 4, 64, 64)]
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[InlineData(27u, 8, 256, 256)] // 8bpp (GPU: 2 words/element)
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[InlineData(27u, 16, 128, 128)] // 16bpp (GPU: 4 words/element)
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[InlineData(9u, 8, 128, 96)]
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[InlineData(8u, 16, 64, 64)] // block-table, 16bpp
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public void DetileWithParams_MatchesTryDetile(uint mode, int bpp, int w, int h)
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{
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var p = GnmTiling.GetDetileParams(mode, bpp, w, h);
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Assert.True(p.IsSupported);
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var blocksHigh = (h + p.BlockHeight - 1) / p.BlockHeight;
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var tiled = new byte[(long)p.BlocksPerRow * blocksHigh * p.BlockBytes];
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for (var i = 0; i < tiled.Length; i++)
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{
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tiled[i] = (byte)((i * 31 + 7) & 0xFF);
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}
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var expected = new byte[w * h * bpp];
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Assert.True(GnmTiling.TryDetile(tiled, expected, mode, w, h, bpp));
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var actual = new byte[w * h * bpp];
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Assert.True(GnmTiling.DetileWithParams(p, tiled, actual));
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Assert.Equal(expected, actual);
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}
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// Array textures are packed as contiguous tiled slices and detiled one slice
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// per layer (dispatch-Z on the GPU; a per-layer loop in the CPU fallbacks)
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// into a layer-major linear buffer. This pins that packing: each slice must
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// deswizzle into its own region and match a per-slice TryDetile, and a
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// per-layer-distinct pattern catches any slice cross-talk.
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[Theory]
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[InlineData(27u, 4, 256, 256, 3)]
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[InlineData(9u, 4, 128, 96, 2)]
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[InlineData(24u, 4, 64, 128, 4)]
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public void DetileWithParams_MultiLayer_MatchesPerSliceTryDetile(uint mode, int bpp, int w, int h, int layers)
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{
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var p = GnmTiling.GetDetileParams(mode, bpp, w, h);
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Assert.True(p.IsSupported);
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var blocksHigh = (h + p.BlockHeight - 1) / p.BlockHeight;
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var sliceTiledBytes = (int)((long)p.BlocksPerRow * blocksHigh * p.BlockBytes);
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var sliceLinearBytes = w * h * bpp;
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var tiled = new byte[sliceTiledBytes * layers];
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for (var layer = 0; layer < layers; layer++)
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{
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for (var i = 0; i < sliceTiledBytes; i++)
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{
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tiled[layer * sliceTiledBytes + i] = (byte)((i * 31 + 7 + layer * 101) & 0xFF);
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}
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}
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// Expected: each slice detiled independently via the shipped CPU detile.
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var expected = new byte[sliceLinearBytes * layers];
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for (var layer = 0; layer < layers; layer++)
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{
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Assert.True(GnmTiling.TryDetile(
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tiled.AsSpan(layer * sliceTiledBytes, sliceTiledBytes),
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expected.AsSpan(layer * sliceLinearBytes, sliceLinearBytes),
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mode, w, h, bpp));
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}
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// Actual: the layer-major loop the Vulkan/Metal CPU fallbacks run.
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var actual = new byte[sliceLinearBytes * layers];
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for (var layer = 0; layer < layers; layer++)
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{
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Assert.True(GnmTiling.DetileWithParams(
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p,
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tiled.AsSpan(layer * sliceTiledBytes, sliceTiledBytes),
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actual.AsSpan(layer * sliceLinearBytes, sliceLinearBytes)));
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}
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Assert.Equal(expected, actual);
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}
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// Reference detile driven entirely by DetileParams — the single shared
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// addressing formula the Vulkan/Metal compute kernel will run per texel.
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private static byte[] DetileViaParams(byte[] tiled, DetileParams p, int w, int h, int bpp)
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{
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var linear = new byte[w * h * bpp];
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for (var y = 0; y < h; y++)
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{
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for (var x = 0; x < w; x++)
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{
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var blockX = x / p.BlockWidth;
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var blockY = y / p.BlockHeight;
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var inX = x % p.BlockWidth;
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var inY = y % p.BlockHeight;
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var inBlockByte = p.Equation == DetileEquation.ExactXor
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? p.XByteTerm[x & p.XMask] ^ p.YByteTerm[y & p.YMask]
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: p.BlockTable[inY * p.BlockWidth + inX] * p.BytesPerElement;
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var srcByte = ((long)blockY * p.BlocksPerRow + blockX) * p.BlockBytes + inBlockByte;
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var dstByte = ((long)y * w + x) * bpp;
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if (srcByte < 0 || srcByte + bpp > tiled.Length)
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{
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continue;
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}
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Array.Copy(tiled, srcByte, linear, dstByte, bpp);
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}
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}
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return linear;
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}
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}
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