mirror of
https://github.com/par274/sharpemu.git
synced 2026-07-22 19:06:15 +08:00
Gutemberg Ribeiro
30fdd8d6ed
* [ShaderCompiler] Extract the backend-neutral shader compiler project Move the Gen5 (gfx10) microcode decoder, the scalar evaluator, the shader IR, and the metadata reader out of SharpEmu.Libs/Agc into a new SharpEmu.ShaderCompiler project — the half of shader compilation every codegen backend (SPIR-V today; MSL and DXIL later) consumes. Types go public: they are the contract now. Nothing in the project may depend on a host graphics API; the SPIR-V-specific artifact types (Gen5SpirvShader, Gen5SpirvStage) stay beside the emitter in Libs. Three couplings surfaced by the move, each resolved at the right depth: GuestDrawKind was defined inside VulkanVideoPresenter despite being a guest-domain, decoder-produced concept — it moves to the shared project; the evaluator's one HLE dependency (the tracked-libc-heap read fallback) becomes an injectable hook that a Libs module initializer installs before any caller can reach the evaluator; and the inline- constant table is promoted to a shared Gen5InlineConstants so backends cannot drift on constant semantics (the SPIR-V translator now delegates to it). The ShaderDump tool drops its reflection over the moved types in favor of direct typed calls; only the SPIR-V emitter, still internal to Libs until it moves to its own backend project, is reached via reflection. Verified by a clean solution build, the existing test suite, and a full ShaderDump conformance run. * [ShaderCompiler] Move the SPIR-V emitter into SharpEmu.ShaderCompiler.Vulkan Gen5SpirvTranslator (with its ALU partial), SpirvModuleBuilder, SpirvFixedShaders, and the Gen5SpirvShader/Gen5SpirvStage artifact types move whole from SharpEmu.Libs/Agc into the first per-backend codegen project. Notably it needs no Vulkan bindings reference: emitters produce bytes from the shared IR; renderers own graphics APIs. Types go public as the backend's contract; AgcExports and the presenter consume them exactly as before. The ShaderDump tool drops its last reflection: with both halves of the pipeline public it drives decode and all three emit entry points with direct typed calls, retiring the PadWithDefaults invoke shim — and it no longer references SharpEmu.Libs at all, making the conformance tool emulator-independent by design. Verified by a clean solution build, the test suite, a full ShaderDump conformance run, and a locked-mode restore under the pinned SDK. * [Gpu] Extract the guest-GPU backend seam (IGuestGpuBackend) The AGC/VideoOut/SystemService export layers now reach the renderer through IGuestGpuBackend via GuestGpu.Current (mirroring HostPlatform), instead of calling VulkanVideoPresenter statics. The Vulkan backend is a thin adapter over the existing presenter, so the extraction stays mechanical; only the adapter and the presenter itself reference the presenter now. The types crossing the seam move to Gpu/GuestGpuTypes.cs and drop their Vulkan prefixes, which an audit showed were misnomers: every field is a neutral primitive or a raw guest value (guest addresses, format and number-type codes, CB_BLEND register bitfields, verbatim sampler descriptor dwords). The one genuine Vulkan value in the old surface — the Silk.NET Format inside VulkanRenderTargetFormat, which callers never read — stops crossing: TryDecodeRenderTargetFormat is replaced at the seam by TryGetRenderTargetOutputKind, which surfaces only the Gen5PixelOutputKind callers actually consume, keeping native formats a backend-internal concern. ToVulkanSampler in AgcExports is renamed ToGuestSampler to match what it always produced. Seam rules are documented on the interface: no host-API value crosses, and submission stays coarse-grained with synchronization internal to backends. Interim exception, resolved next: shader parameters are still SPIR-V blobs. * [Gpu] Move shader compilation behind the guest-GPU backend The seam's interim exception is gone: AgcExports no longer calls Gen5SpirvTranslator or handles SPIR-V bytes. IGuestGpuBackend gains the three TryCompile entry points, which take the backend-neutral (Gen5ShaderState, Gen5ShaderEvaluation) contract plus the flat per-role resource-slot bases a multi-stage draw needs, and return opaque IGuestCompiledShader handles that only the producing backend can submit — the Vulkan backend wraps its SPIR-V in VulkanCompiledGuestShader and rejects foreign handles loudly. Draw and dispatch submissions take handles instead of byte arrays; the shader caches in AgcExports store handles. IGuestCompiledShader.Payload exposes the backend-defined compiled bytes for exactly two callers: the diagnostics dump and the size trace — documented as never-interpret. The unused _pixelSpirvCache is deleted. With this, a Metal or DX12 backend plugs in by implementing IGuestGpuBackend with its own codegen; nothing in the export layers knows which shader format exists. Verified by a clean solution build, the test suite, and a full ShaderDump conformance run under the pinned SDK. * [Gpu] Fix rename collateral from the seam extraction Address review findings: a doc comment picked up the mechanical VulkanVideoPresenter -> GuestGpu.Current rewrite and ended up naming members that do not exist on the interface, and CreateVulkanIndexBuffer kept its Vulkan prefix while every sibling factory was de-Vulkanized — it produces the neutral GuestIndexBuffer, so it is CreateGuestIndexBuffer. * [Gpu] Label diagnostics dumps with the backend's payload extension Address the review's altitude finding on DumpSpirv: the dump helper's IR-disassembly half is backend-neutral and stays put, but writing the opaque payload to a hardcoded .spv interpreted bytes the seam says never to interpret. IGuestCompiledShader now declares its payload's file extension, and the renamed DumpCompiledShader takes the handle and writes honestly-labeled dumps whichever backend produced them. * [Gpu] Make the shader-cache hit path allocation-free and lock-free Every translated draw built its cache key with a LINQ Select feeding string.Join plus one interpolated string per render target — steady per-draw allocation whether or not the shaders were already cached. The output layout is now packed exactly into a ulong (guest slot in 6 bits + output kind in 2 bits per target, host locations being the byte positions, target count in the key beside it), and the Gen5PixelOutputBinding array is only materialized on a cache miss, where compilation dwarfs it. The graphics/compute shader caches switch from Dictionary guarded by _submitTraceGate to ConcurrentDictionary, making the per-draw and per-dispatch hit paths lock-free and decoupling them from the tracing gate they coincidentally shared. And the seam-shaped render-target list is built once when a translated draw is created instead of a Select/ToArray per submission of a cached draw. * [Gpu] Replace LINQ with explicit loops in code this branch introduced Project rule going forward: no LINQ — it allocates enumerators, closures, and delegates, and this codebase is GC-pause-sensitive. The pixel-output and guest-render-target array builds and the ShaderDump store-PC collection become plain loops; pre-existing LINQ elsewhere is left for changes that already touch those lines. * [ShaderCompiler] Suppress CA2255 on the evaluator hook installer The analyzer coverage that arrived with the rebase flags ModuleInitializer in library code; this is the rule's intended advanced scenario — the hook must be installed before any code path can reach the evaluator, and every such path enters through this assembly — so suppress with that justification rather than weaken the guarantee to a static constructor's lazier timing. * [Gpu] Resolve rebase artifacts onto main Dedupe the System.Collections.Concurrent using in AgcExports that the rebase merge duplicated (main and this branch each added it), and regenerate the lock files for the new shader-compiler projects and SharpEmu.Libs against main's current package graph so --locked-mode restore matches at the branch tip. * [CI] Comment per-platform build artifact links on PRs Adds a workflow_run workflow that, after "Build and Release" finishes a pull-request build, posts (and keeps updated in place) a single PR comment linking the Windows, Linux, and macOS artifacts from that run. It runs via workflow_run rather than in the build workflow because PRs from forks build with a read-only token that cannot comment; the follow-on run executes in the base-repo context with write access and without checking out fork code. GitHub only triggers workflow_run from the default branch, so this takes effect once merged to main.
1842 lines
63 KiB
C#
1842 lines
63 KiB
C#
// Copyright (C) 2026 SharpEmu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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using SharpEmu.HLE;
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using System.Numerics;
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namespace SharpEmu.ShaderCompiler;
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public static class Gen5ShaderScalarEvaluator
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{
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/// <summary>
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/// Optional fallback for global-memory reads that ctx.Memory cannot satisfy (the
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/// emulator installs the HLE-tracked libc heap reader here at module load). Kept as
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/// a hook so this project never depends on the HLE module implementations.
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/// </summary>
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public static Gen5FallbackMemoryReader? FallbackMemoryReader { get; set; }
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public delegate bool Gen5FallbackMemoryReader(ulong baseAddress, Span<byte> destination);
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private const int ScalarRegisterCount = 256;
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private const int ImageDescriptorDwords = 8;
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private const int SamplerDescriptorDwords = 4;
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private const int MaxGlobalMemoryBindingBytes = 16 * 1024 * 1024;
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private static readonly int DefaultGlobalMemoryBindingBytes =
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int.TryParse(
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Environment.GetEnvironmentVariable("SHARPEMU_GLOBAL_BINDING_BYTES"),
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out var configured) && configured >= sizeof(uint)
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? Math.Min(configured, MaxGlobalMemoryBindingBytes)
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: 1 * 1024 * 1024;
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public static long GlobalMemoryReadCount;
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public static long GlobalMemoryReadBytes;
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public static long GlobalMemoryReadCacheHits;
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public static long GlobalMemoryReadPvmBytes;
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public static long GlobalMemoryReadLibcBytes;
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public static long GlobalMemoryReadReuses;
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private const long CrossFrameReadCacheMaxBytes = 1024L * 1024 * 1024;
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private static readonly object _crossFrameReadGate = new();
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private static readonly Dictionary<(ulong BaseAddress, int SizeBytes), byte[]> _crossFrameReadCache = new();
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private static long _crossFrameReadCacheBytes;
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private const ulong RdnaWaveMask = 0xFFFF_FFFFUL;
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private readonly record struct BufferDescriptor(
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ulong BaseAddress,
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uint Stride,
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uint NumRecords,
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ulong SizeBytes,
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uint NumberFormat,
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uint DataFormat);
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public static bool TryResolveImageBindings(
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CpuContext ctx,
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Gen5ShaderState state,
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out IReadOnlyList<Gen5ImageBinding> bindings,
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out string error)
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{
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if (TryEvaluate(ctx, state, out var evaluation, out error))
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{
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bindings = evaluation.ImageBindings;
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return true;
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}
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bindings = [];
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return false;
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}
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public static bool TryEvaluate(
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CpuContext ctx,
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Gen5ShaderState state,
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out Gen5ShaderEvaluation evaluation,
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out string error,
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bool resolveVertexInputs = false,
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uint? vertexRecordLimit = null)
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{
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evaluation = default!;
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error = string.Empty;
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var scalarRegisters = new uint[ScalarRegisterCount];
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for (var index = 0;
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index < state.UserData.Count &&
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state.UserDataScalarRegisterBase + (uint)index < scalarRegisters.Length;
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index++)
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{
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scalarRegisters[state.UserDataScalarRegisterBase + (uint)index] =
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state.UserData[index];
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}
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if (state.ComputeSystemRegisters is { } computeSystemRegisters)
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{
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computeSystemRegisters.ClearStaticValues(scalarRegisters);
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}
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var execMask = RdnaWaveMask;
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WriteScalarPair(scalarRegisters, 106, 0, ref execMask);
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WriteScalarPair(scalarRegisters, 126, execMask, ref execMask);
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var initialScalarRegisters = (uint[])scalarRegisters.Clone();
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var resolved = new List<Gen5ImageBinding>();
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var globalMemoryBindings = new List<Gen5GlobalMemoryBinding>();
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var globalMemoryByAddress = new Dictionary<(uint ScalarAddress, ulong BaseAddress), Gen5GlobalMemoryBinding>();
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var vertexInputBindings = new List<Gen5VertexInputBinding>();
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var runtimeScalarRegisters = CollectRuntimeScalarRegisters(state.Program);
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var scalarRegisterSnapshots = new Dictionary<uint, IReadOnlyList<uint>>();
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var scalarConditionCode = false;
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uint? skipUntilPc = null;
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foreach (var instruction in state.Program.Instructions)
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{
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if (skipUntilPc.HasValue)
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{
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if (instruction.Pc < skipUntilPc.Value)
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{
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continue;
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}
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skipUntilPc = null;
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}
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scalarRegisterSnapshots[instruction.Pc] = (uint[])scalarRegisters.Clone();
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if (instruction.Opcode == "SEndpgm")
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{
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break;
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}
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if (instruction.Opcode == "SBranch" &&
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TryGetSoppBranchTargetPc(instruction, out var targetPc) &&
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targetPc > instruction.Pc)
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{
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skipUntilPc = targetPc;
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continue;
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}
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if (instruction.Encoding == Gen5ShaderEncoding.Sopc)
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{
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if (!TryExecuteScalarCompare(
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instruction,
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scalarRegisters,
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out scalarConditionCode,
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out error))
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{
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return false;
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}
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continue;
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}
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if (instruction.Encoding == Gen5ShaderEncoding.Sopk &&
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instruction.Opcode.StartsWith("SCmpk", StringComparison.Ordinal))
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{
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if (!TryExecuteScalarCompareK(
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instruction,
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scalarRegisters,
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out scalarConditionCode,
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out error))
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{
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return false;
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}
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continue;
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}
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if (instruction.Encoding is
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Gen5ShaderEncoding.Sop1 or
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Gen5ShaderEncoding.Sop2 or
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Gen5ShaderEncoding.Sopk)
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{
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if (instruction.Opcode is "SSetpcB64" or "SSwappcB64")
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{
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break;
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}
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if (!TryExecuteScalarAlu(
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instruction,
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state.Program.Address,
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scalarRegisters,
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ref execMask,
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ref scalarConditionCode,
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out error))
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{
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return false;
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}
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continue;
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}
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if (instruction.Control is Gen5ScalarMemoryControl scalarMemory)
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{
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foreach (var destination in instruction.Destinations)
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{
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if (destination.Kind == Gen5OperandKind.ScalarRegister && destination.Value < ScalarRegisterCount)
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{
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runtimeScalarRegisters.Add(destination.Value);
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}
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}
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if (!TryExecuteScalarLoad(ctx, state, instruction, scalarMemory, scalarRegisters, globalMemoryBindings, globalMemoryByAddress, runtimeScalarRegisters, out error))
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{
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return false;
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}
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continue;
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}
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if (instruction.Control is Gen5GlobalMemoryControl globalMemory)
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{
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if (globalMemory.ScalarAddress >= ScalarRegisterCount - 1)
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{
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error =
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$"global-address-register-range pc=0x{instruction.Pc:X} " +
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$"s{globalMemory.ScalarAddress}";
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return false;
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}
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var baseAddress =
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scalarRegisters[globalMemory.ScalarAddress] |
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((ulong)scalarRegisters[globalMemory.ScalarAddress + 1] << 32);
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if (baseAddress == 0)
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{
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error = $"global-address-null pc=0x{instruction.Pc:X}";
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return false;
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}
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var key = (globalMemory.ScalarAddress, baseAddress);
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if (globalMemoryByAddress.TryGetValue(key, out var existingBinding))
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{
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if (existingBinding.InstructionPcs is List<uint> instructionPcs)
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{
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instructionPcs.Add(instruction.Pc);
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}
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}
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else
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{
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byte[] data;
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if (!TryReadGlobalMemory(ctx, baseAddress, out data))
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{
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error =
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$"global-memory-read-failed pc=0x{instruction.Pc:X} " +
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$"address=0x{baseAddress:X16}";
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return false;
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}
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var binding = new Gen5GlobalMemoryBinding(
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globalMemory.ScalarAddress,
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baseAddress,
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new List<uint> { instruction.Pc },
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data);
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globalMemoryByAddress.Add(key, binding);
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globalMemoryBindings.Add(binding);
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}
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continue;
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}
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if (instruction.Control is Gen5BufferMemoryControl bufferMemory)
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{
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if (bufferMemory.ScalarResource >= ScalarRegisterCount - 3)
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{
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error =
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$"buffer-resource-register-range pc=0x{instruction.Pc:X} " +
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$"s{bufferMemory.ScalarResource}";
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return false;
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}
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if (!TryDecodeBufferDescriptor(
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scalarRegisters,
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bufferMemory.ScalarResource,
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strictType: true,
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out var bufferDescriptor))
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{
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error =
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$"buffer-descriptor-invalid pc=0x{instruction.Pc:X} " +
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$"s{bufferMemory.ScalarResource}";
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return false;
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}
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if (bufferDescriptor.BaseAddress == 0)
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{
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error = $"buffer-address-null pc=0x{instruction.Pc:X}";
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return false;
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}
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if (resolveVertexInputs &&
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IsVertexFetchCandidate(instruction, bufferMemory, bufferDescriptor))
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{
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var vertexReadSize = bufferDescriptor.SizeBytes;
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if (vertexRecordLimit is { } recordLimit &&
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instruction.Sources.Count > 2 &&
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TryEvaluateScalarOperand(
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instruction.Sources[2],
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scalarRegisters,
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out var scalarOffset))
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{
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var bindingOffset = unchecked((uint)bufferMemory.OffsetBytes + scalarOffset);
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var requiredBytes =
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(ulong)bindingOffset +
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(ulong)(Math.Max(recordLimit, 1u) - 1u) * bufferDescriptor.Stride +
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(ulong)bufferMemory.DwordCount * sizeof(uint);
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vertexReadSize = Math.Min(
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bufferDescriptor.SizeBytes,
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Math.Max(requiredBytes, sizeof(uint)));
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}
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if (!TryReadGlobalMemory(
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ctx,
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bufferDescriptor.BaseAddress,
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vertexReadSize,
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out var vertexData))
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{
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error =
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$"vertex-buffer-read-failed pc=0x{instruction.Pc:X} " +
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$"address=0x{bufferDescriptor.BaseAddress:X16} " +
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$"bytes={bufferDescriptor.SizeBytes} " +
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$"stride={bufferDescriptor.Stride} records={bufferDescriptor.NumRecords}";
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return false;
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}
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if (!TryCreateVertexInputBinding(
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instruction,
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bufferMemory,
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bufferDescriptor,
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vertexData,
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(uint)vertexInputBindings.Count,
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scalarRegisters,
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out var vertexInputBinding))
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{
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error =
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$"vertex-input-binding-failed pc=0x{instruction.Pc:X} " +
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$"s{bufferMemory.ScalarResource}";
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return false;
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}
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vertexInputBindings.Add(vertexInputBinding);
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continue;
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}
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var key = (bufferMemory.ScalarResource, bufferDescriptor.BaseAddress);
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if (globalMemoryByAddress.TryGetValue(key, out var existingBinding))
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{
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if (existingBinding.InstructionPcs is List<uint> instructionPcs)
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{
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instructionPcs.Add(instruction.Pc);
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}
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}
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else
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{
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if (!TryReadGlobalMemory(
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ctx,
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bufferDescriptor.BaseAddress,
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bufferDescriptor.SizeBytes,
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out var data))
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{
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var descriptorWords = string.Join(
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':',
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Enumerable.Range(0, 4).Select(index =>
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$"{scalarRegisters[bufferMemory.ScalarResource + (uint)index]:X8}"));
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error =
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$"buffer-memory-read-failed pc=0x{instruction.Pc:X} " +
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$"address=0x{bufferDescriptor.BaseAddress:X16} " +
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$"bytes={bufferDescriptor.SizeBytes} " +
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$"stride={bufferDescriptor.Stride} records={bufferDescriptor.NumRecords} " +
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$"s{bufferMemory.ScalarResource}=[{descriptorWords}]";
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return false;
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}
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var binding = new Gen5GlobalMemoryBinding(
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bufferMemory.ScalarResource,
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bufferDescriptor.BaseAddress,
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new List<uint> { instruction.Pc },
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data);
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globalMemoryByAddress.Add(key, binding);
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globalMemoryBindings.Add(binding);
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}
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continue;
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}
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if (instruction.Control is not Gen5ImageControl image)
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{
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continue;
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}
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if (!TryCopyRegisters(
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scalarRegisters,
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image.ScalarResource,
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ImageDescriptorDwords,
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out var resourceDescriptor))
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{
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error = $"resource-register-range pc=0x{instruction.Pc:X} s{image.ScalarResource}";
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return false;
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}
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IReadOnlyList<uint> samplerDescriptor = [];
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if (UsesSampler(instruction.Opcode) &&
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!TryCopyRegisters(
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scalarRegisters,
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image.ScalarSampler,
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SamplerDescriptorDwords,
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out samplerDescriptor))
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{
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error = $"sampler-register-range pc=0x{instruction.Pc:X} s{image.ScalarSampler}";
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return false;
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}
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resolved.Add(new Gen5ImageBinding(
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instruction.Pc,
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instruction.Opcode,
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image,
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resourceDescriptor,
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samplerDescriptor,
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instruction.Opcode is "ImageLoadMip" or "ImageStoreMip" &&
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TryResolveVectorConstantBefore(
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state.Program,
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instruction.Pc,
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image.GetAddressRegister(2),
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out var mipLevel)
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? mipLevel
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: null));
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}
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evaluation = new Gen5ShaderEvaluation(
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initialScalarRegisters,
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scalarRegisters,
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scalarRegisterSnapshots,
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resolved,
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globalMemoryBindings,
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state.ComputeSystemRegisters,
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runtimeScalarRegisters,
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vertexInputBindings);
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return true;
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}
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|
|
private static bool TryCreateVertexInputBinding(
|
|
Gen5ShaderInstruction instruction,
|
|
Gen5BufferMemoryControl control,
|
|
BufferDescriptor descriptor,
|
|
byte[] data,
|
|
uint location,
|
|
uint[] scalarRegisters,
|
|
out Gen5VertexInputBinding binding)
|
|
{
|
|
binding = default!;
|
|
if (!IsVertexFetchCandidate(instruction, control, descriptor) ||
|
|
instruction.Sources.Count <= 2 ||
|
|
!TryEvaluateScalarOperand(instruction.Sources[2], scalarRegisters, out var scalarOffset))
|
|
{
|
|
return false;
|
|
}
|
|
|
|
var bindingData = data;
|
|
var bindingStride = descriptor.Stride;
|
|
var bindingOffset = unchecked((uint)control.OffsetBytes + scalarOffset);
|
|
var bindingDataFormat = descriptor.DataFormat;
|
|
var bindingNumberFormat = descriptor.NumberFormat;
|
|
binding = new Gen5VertexInputBinding(
|
|
instruction.Pc,
|
|
location,
|
|
control.DwordCount,
|
|
bindingDataFormat,
|
|
bindingNumberFormat,
|
|
descriptor.BaseAddress,
|
|
bindingStride,
|
|
bindingOffset,
|
|
bindingData);
|
|
return true;
|
|
}
|
|
|
|
private static bool IsVertexFetchCandidate(
|
|
Gen5ShaderInstruction instruction,
|
|
Gen5BufferMemoryControl control,
|
|
BufferDescriptor descriptor) =>
|
|
control.IndexEnabled &&
|
|
!control.OffsetEnabled &&
|
|
control.DwordCount is >= 1 and <= 4 &&
|
|
descriptor.BaseAddress != 0 &&
|
|
descriptor.Stride != 0 &&
|
|
(instruction.Opcode.StartsWith("BufferLoadFormat", StringComparison.Ordinal) ||
|
|
instruction.Opcode.StartsWith("TBufferLoadFormat", StringComparison.Ordinal));
|
|
|
|
private static HashSet<uint> CollectRuntimeScalarRegisters(Gen5ShaderProgram program)
|
|
{
|
|
var registers = new HashSet<uint>();
|
|
foreach (var instruction in program.Instructions)
|
|
{
|
|
foreach (var operand in instruction.Sources.Concat(instruction.Destinations))
|
|
{
|
|
if (operand.Kind == Gen5OperandKind.ScalarRegister &&
|
|
operand.Value < ScalarRegisterCount)
|
|
{
|
|
registers.Add(operand.Value);
|
|
}
|
|
}
|
|
|
|
if (instruction.Control is Gen5ScalarMemoryControl
|
|
{
|
|
DynamicOffsetRegister: { } offsetRegister,
|
|
} &&
|
|
offsetRegister < ScalarRegisterCount)
|
|
{
|
|
registers.Add(offsetRegister);
|
|
}
|
|
}
|
|
|
|
return registers;
|
|
}
|
|
|
|
private static bool TryGetSoppBranchTargetPc(
|
|
Gen5ShaderInstruction instruction,
|
|
out uint targetPc)
|
|
{
|
|
targetPc = 0;
|
|
if (instruction.Encoding != Gen5ShaderEncoding.Sopp ||
|
|
instruction.Words.Count == 0)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
var offset = unchecked((short)(instruction.Words[0] & 0xFFFF));
|
|
var nextPc = (long)instruction.Pc + instruction.Words.Count * sizeof(uint);
|
|
var target = nextPc + offset * sizeof(uint);
|
|
if (target < 0 || target > uint.MaxValue)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
targetPc = (uint)target;
|
|
return true;
|
|
}
|
|
|
|
private static bool TryResolveVectorConstantBefore(
|
|
Gen5ShaderProgram program,
|
|
uint pc,
|
|
uint vectorRegister,
|
|
out uint value)
|
|
{
|
|
for (var index = program.Instructions.Count - 1; index >= 0; index--)
|
|
{
|
|
var instruction = program.Instructions[index];
|
|
if (instruction.Pc >= pc ||
|
|
instruction.Destinations.Count != 1 ||
|
|
instruction.Destinations[0] is not
|
|
{
|
|
Kind: Gen5OperandKind.VectorRegister,
|
|
Value: var destination,
|
|
} ||
|
|
destination != vectorRegister)
|
|
{
|
|
continue;
|
|
}
|
|
|
|
if (instruction.Opcode == "VMovB32" &&
|
|
instruction.Sources.Count == 1 &&
|
|
TryResolveConstantOperand(instruction.Sources[0], out value))
|
|
{
|
|
return true;
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
value = 0;
|
|
return false;
|
|
}
|
|
|
|
private static bool TryResolveConstantOperand(Gen5Operand operand, out uint value)
|
|
{
|
|
if (operand.Kind == Gen5OperandKind.LiteralConstant)
|
|
{
|
|
value = operand.Value;
|
|
return true;
|
|
}
|
|
|
|
if (operand.Kind == Gen5OperandKind.EncodedConstant)
|
|
{
|
|
return TryDecodeInlineConstant(operand.Value, out value);
|
|
}
|
|
|
|
value = 0;
|
|
return false;
|
|
}
|
|
|
|
[ThreadStatic]
|
|
private static Dictionary<(ulong BaseAddress, int SizeBytes), byte[]>? _globalMemoryReadCache;
|
|
|
|
public static void BeginGlobalMemoryReadScope()
|
|
{
|
|
_globalMemoryReadCache = new Dictionary<(ulong, int), byte[]>();
|
|
}
|
|
|
|
public static void EndGlobalMemoryReadScope()
|
|
{
|
|
_globalMemoryReadCache = null;
|
|
}
|
|
|
|
private static bool TryReadGlobalMemory(
|
|
CpuContext ctx,
|
|
ulong baseAddress,
|
|
out byte[] data)
|
|
{
|
|
return TryReadGlobalMemory(
|
|
ctx,
|
|
baseAddress,
|
|
(ulong)DefaultGlobalMemoryBindingBytes,
|
|
out data);
|
|
}
|
|
|
|
private static bool TryReadGlobalMemory(
|
|
CpuContext ctx,
|
|
ulong baseAddress,
|
|
ulong sizeBytes,
|
|
out byte[] data)
|
|
{
|
|
if (sizeBytes == 0)
|
|
{
|
|
data = [];
|
|
return false;
|
|
}
|
|
|
|
var cappedSize = Math.Min(sizeBytes, MaxGlobalMemoryBindingBytes);
|
|
if (cappedSize > int.MaxValue)
|
|
{
|
|
data = [];
|
|
return false;
|
|
}
|
|
|
|
var cache = _globalMemoryReadCache;
|
|
var cacheKey = (baseAddress, (int)cappedSize);
|
|
if (cache is not null && cache.TryGetValue(cacheKey, out var cached))
|
|
{
|
|
Interlocked.Increment(ref GlobalMemoryReadCacheHits);
|
|
data = cached;
|
|
return true;
|
|
}
|
|
|
|
byte[]? previous;
|
|
lock (_crossFrameReadGate)
|
|
{
|
|
_crossFrameReadCache.TryGetValue(cacheKey, out previous);
|
|
}
|
|
|
|
if (previous is not null && ctx.Memory.TryCompare(baseAddress, previous))
|
|
{
|
|
Interlocked.Increment(ref GlobalMemoryReadReuses);
|
|
if (cache is not null)
|
|
{
|
|
cache[cacheKey] = previous;
|
|
}
|
|
|
|
data = previous;
|
|
return true;
|
|
}
|
|
|
|
var candidateSize = (int)cappedSize;
|
|
while (candidateSize >= sizeof(uint))
|
|
{
|
|
data = GC.AllocateUninitializedArray<byte>(candidateSize);
|
|
var readFromPvm = ctx.Memory.TryRead(baseAddress, data);
|
|
if (readFromPvm ||
|
|
FallbackMemoryReader?.Invoke(baseAddress, data) == true)
|
|
{
|
|
Interlocked.Increment(ref GlobalMemoryReadCount);
|
|
Interlocked.Add(ref GlobalMemoryReadBytes, data.Length);
|
|
if (readFromPvm)
|
|
{
|
|
Interlocked.Add(ref GlobalMemoryReadPvmBytes, data.Length);
|
|
}
|
|
else
|
|
{
|
|
Interlocked.Add(ref GlobalMemoryReadLibcBytes, data.Length);
|
|
}
|
|
|
|
if (cache is not null)
|
|
{
|
|
cache[cacheKey] = data;
|
|
}
|
|
|
|
lock (_crossFrameReadGate)
|
|
{
|
|
if (_crossFrameReadCache.TryGetValue(cacheKey, out var replaced))
|
|
{
|
|
_crossFrameReadCacheBytes -= replaced.Length;
|
|
}
|
|
|
|
if (_crossFrameReadCacheBytes + data.Length > CrossFrameReadCacheMaxBytes)
|
|
{
|
|
_crossFrameReadCache.Clear();
|
|
_crossFrameReadCacheBytes = 0;
|
|
}
|
|
|
|
_crossFrameReadCache[cacheKey] = data;
|
|
_crossFrameReadCacheBytes += data.Length;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
if (candidateSize == sizeof(uint))
|
|
{
|
|
break;
|
|
}
|
|
|
|
candidateSize = Math.Max(candidateSize / 2, sizeof(uint));
|
|
}
|
|
|
|
data = [];
|
|
return false;
|
|
}
|
|
|
|
private static bool TryExecuteScalarAlu(
|
|
Gen5ShaderInstruction instruction,
|
|
ulong programAddress,
|
|
uint[] registers,
|
|
ref ulong execMask,
|
|
ref bool scalarConditionCode,
|
|
out string error)
|
|
{
|
|
error = string.Empty;
|
|
if (instruction.Destinations.Count != 1 ||
|
|
instruction.Destinations[0] is not
|
|
{
|
|
Kind: Gen5OperandKind.ScalarRegister,
|
|
Value: < ScalarRegisterCount,
|
|
} destination)
|
|
{
|
|
error = $"unsupported-scalar-destination pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
if (instruction.Opcode == "SMovkI32")
|
|
{
|
|
registers[destination.Value] = unchecked((uint)(short)instruction.Sources[0].Value);
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Opcode is "SAddkI32" or "SMulkI32")
|
|
{
|
|
var immediate = unchecked((uint)(short)instruction.Sources[0].Value);
|
|
registers[destination.Value] = instruction.Opcode == "SAddkI32"
|
|
? registers[destination.Value] + immediate
|
|
: unchecked((uint)((int)registers[destination.Value] * (int)immediate));
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Opcode == "SGetpcB64")
|
|
{
|
|
var pc = programAddress + instruction.Pc + (ulong)(instruction.Words.Count * sizeof(uint));
|
|
WriteScalarPair(registers, destination.Value, pc, ref execMask);
|
|
return true;
|
|
}
|
|
|
|
if (TryExecuteSaveExecScalarAlu(
|
|
instruction,
|
|
registers,
|
|
ref execMask,
|
|
ref scalarConditionCode,
|
|
out error))
|
|
{
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Opcode is "SMovB64" or "SWqmB64" or "SNotB64")
|
|
{
|
|
if (destination.Value >= ScalarRegisterCount - 1 ||
|
|
!TryEvaluateScalarOperand64(
|
|
instruction.Sources[0],
|
|
registers,
|
|
execMask,
|
|
out var value))
|
|
{
|
|
error = $"scalar-source64 pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
if (instruction.Opcode == "SNotB64")
|
|
{
|
|
value = ~value;
|
|
scalarConditionCode = value != 0;
|
|
}
|
|
|
|
WriteScalarPair(registers, destination.Value, value, ref execMask);
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Opcode is "SLshlB64" or "SLshrB64")
|
|
{
|
|
if (instruction.Sources.Count < 2 ||
|
|
destination.Value >= ScalarRegisterCount - 1 ||
|
|
!TryEvaluateScalarOperand64(
|
|
instruction.Sources[0],
|
|
registers,
|
|
execMask,
|
|
out var value) ||
|
|
!TryEvaluateScalarOperand(
|
|
instruction.Sources[1],
|
|
registers,
|
|
out var shift))
|
|
{
|
|
error = $"scalar-source64 pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
value = instruction.Opcode == "SLshlB64"
|
|
? value << ((int)shift & 63)
|
|
: value >> ((int)shift & 63);
|
|
WriteScalarPair(registers, destination.Value, value, ref execMask);
|
|
scalarConditionCode = value != 0;
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Opcode is "SBfeU64" or "SBfeI64")
|
|
{
|
|
if (instruction.Sources.Count < 2 ||
|
|
destination.Value >= ScalarRegisterCount - 1 ||
|
|
!TryEvaluateScalarOperand64(
|
|
instruction.Sources[0],
|
|
registers,
|
|
execMask,
|
|
out var source) ||
|
|
!TryEvaluateScalarOperand(
|
|
instruction.Sources[1],
|
|
registers,
|
|
out var control))
|
|
{
|
|
error = $"scalar-source64 pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
var offset = (int)control & 63;
|
|
var width = Math.Min(((int)control >> 16) & 0x7F, 64 - offset);
|
|
ulong value;
|
|
if (width == 0)
|
|
{
|
|
value = 0;
|
|
}
|
|
else
|
|
{
|
|
value = source >> offset;
|
|
if (width < 64)
|
|
{
|
|
value &= ulong.MaxValue >> (64 - width);
|
|
if (instruction.Opcode == "SBfeI64")
|
|
{
|
|
value = unchecked((ulong)((long)(value << (64 - width)) >> (64 - width)));
|
|
}
|
|
}
|
|
}
|
|
|
|
WriteScalarPair(registers, destination.Value, value, ref execMask);
|
|
scalarConditionCode = value != 0;
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Opcode is
|
|
"SCselectB64" or
|
|
"SAndB64" or
|
|
"SOrB64" or
|
|
"SXorB64" or
|
|
"SAndn2B64" or
|
|
"SOrn2B64" or
|
|
"SNandB64" or
|
|
"SNorB64" or
|
|
"SXnorB64")
|
|
{
|
|
if (instruction.Sources.Count < 2 ||
|
|
!TryEvaluateScalarOperand64(
|
|
instruction.Sources[0],
|
|
registers,
|
|
execMask,
|
|
out var maskLeft) ||
|
|
!TryEvaluateScalarOperand64(
|
|
instruction.Sources[1],
|
|
registers,
|
|
execMask,
|
|
out var maskRight))
|
|
{
|
|
error = $"scalar-source64 pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
var value = instruction.Opcode switch
|
|
{
|
|
"SCselectB64" => scalarConditionCode ? maskLeft : maskRight,
|
|
"SAndB64" => maskLeft & maskRight,
|
|
"SOrB64" => maskLeft | maskRight,
|
|
"SXorB64" => maskLeft ^ maskRight,
|
|
"SAndn2B64" => maskLeft & ~maskRight,
|
|
"SOrn2B64" => maskLeft | ~maskRight,
|
|
"SNandB64" => ~(maskLeft & maskRight),
|
|
"SNorB64" => ~(maskLeft | maskRight),
|
|
_ => ~(maskLeft ^ maskRight),
|
|
};
|
|
WriteScalarPair(registers, destination.Value, value, ref execMask);
|
|
scalarConditionCode = value != 0;
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Sources.Count == 0 ||
|
|
!TryEvaluateScalarOperand(instruction.Sources[0], registers, out var left))
|
|
{
|
|
var source = instruction.Sources.Count == 0
|
|
? "<missing>"
|
|
: instruction.Sources[0].ToString();
|
|
error = $"scalar-source0 pc=0x{instruction.Pc:X} op={instruction.Opcode} source={source}";
|
|
return false;
|
|
}
|
|
|
|
if (instruction.Opcode == "SMovB32")
|
|
{
|
|
registers[destination.Value] = left;
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Opcode is
|
|
"SNotB32" or
|
|
"SBrevB32" or
|
|
"SBcnt1I32B32" or
|
|
"SFF1I32B32" or
|
|
"SBitset1B32")
|
|
{
|
|
registers[destination.Value] = instruction.Opcode switch
|
|
{
|
|
"SNotB32" => ~left,
|
|
"SBrevB32" => ReverseBits(left),
|
|
"SBcnt1I32B32" => (uint)BitOperations.PopCount(left),
|
|
"SFF1I32B32" => left == 0 ? uint.MaxValue : (uint)BitOperations.TrailingZeroCount(left),
|
|
_ => registers[destination.Value] | (1u << ((int)left & 31)),
|
|
};
|
|
if (instruction.Opcode != "SBitset1B32")
|
|
{
|
|
scalarConditionCode = registers[destination.Value] != 0;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Sources.Count < 2 ||
|
|
!TryEvaluateScalarOperand(instruction.Sources[1], registers, out var right))
|
|
{
|
|
var source = instruction.Sources.Count < 2
|
|
? "<missing>"
|
|
: instruction.Sources[1].ToString();
|
|
error = $"scalar-source1 pc=0x{instruction.Pc:X} op={instruction.Opcode} source={source}";
|
|
return false;
|
|
}
|
|
|
|
uint result;
|
|
switch (instruction.Opcode)
|
|
{
|
|
case "SAddU32":
|
|
{
|
|
var wide = (ulong)left + right;
|
|
result = (uint)wide;
|
|
scalarConditionCode = wide > uint.MaxValue;
|
|
break;
|
|
}
|
|
case "SSubU32":
|
|
result = left - right;
|
|
scalarConditionCode = right > left;
|
|
break;
|
|
case "SAddI32":
|
|
result = unchecked((uint)((int)left + (int)right));
|
|
scalarConditionCode = SignedAddOverflow(left, right, result);
|
|
break;
|
|
case "SSubI32":
|
|
result = unchecked((uint)((int)left - (int)right));
|
|
scalarConditionCode = SignedSubOverflow(left, right, result);
|
|
break;
|
|
case "SAddcU32":
|
|
{
|
|
var wide = (ulong)left + right + (scalarConditionCode ? 1UL : 0UL);
|
|
result = (uint)wide;
|
|
scalarConditionCode = wide > uint.MaxValue;
|
|
break;
|
|
}
|
|
case "SSubbU32":
|
|
{
|
|
var borrow = scalarConditionCode ? 1UL : 0UL;
|
|
var subtrahend = (ulong)right + borrow;
|
|
result = unchecked(left - (uint)subtrahend);
|
|
scalarConditionCode = subtrahend > left;
|
|
break;
|
|
}
|
|
case "SMinI32":
|
|
result = unchecked((uint)Math.Min((int)left, (int)right));
|
|
scalarConditionCode = (int)left < (int)right;
|
|
break;
|
|
case "SMinU32":
|
|
result = Math.Min(left, right);
|
|
scalarConditionCode = left < right;
|
|
break;
|
|
case "SMaxI32":
|
|
result = unchecked((uint)Math.Max((int)left, (int)right));
|
|
scalarConditionCode = (int)left > (int)right;
|
|
break;
|
|
case "SMaxU32":
|
|
result = Math.Max(left, right);
|
|
scalarConditionCode = left > right;
|
|
break;
|
|
case "SCselectB32":
|
|
result = scalarConditionCode ? left : right;
|
|
break;
|
|
case "SAndB32":
|
|
result = left & right;
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SOrB32":
|
|
result = left | right;
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SXorB32":
|
|
result = left ^ right;
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SAndn2B32":
|
|
result = left & ~right;
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SOrn2B32":
|
|
result = left | ~right;
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SNandB32":
|
|
result = ~(left & right);
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SNorB32":
|
|
result = ~(left | right);
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SXnorB32":
|
|
result = ~(left ^ right);
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SLshlB32":
|
|
result = left << ((int)right & 31);
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SLshrB32":
|
|
result = left >> ((int)right & 31);
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SAshrI32":
|
|
result = unchecked((uint)((int)left >> ((int)right & 31)));
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SBfmB32":
|
|
{
|
|
var width = (int)left & 31;
|
|
var offset = (int)right & 31;
|
|
result = width == 0 ? 0 : ((1u << width) - 1u) << offset;
|
|
break;
|
|
}
|
|
case "SMulI32":
|
|
result = unchecked((uint)((int)left * (int)right));
|
|
break;
|
|
case "SBfeU32":
|
|
{
|
|
var offset = (int)right & 31;
|
|
var width = Math.Min(((int)right >> 16) & 0x7F, 32 - offset);
|
|
result = width == 0 ? 0 : left >> offset & (uint.MaxValue >> (32 - width));
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
}
|
|
case "SBfeI32":
|
|
{
|
|
var offset = (int)right & 31;
|
|
var width = Math.Min(((int)right >> 16) & 0x7F, 32 - offset);
|
|
result = width == 0
|
|
? 0
|
|
: unchecked((uint)(((int)(left << (32 - width - offset))) >> (32 - width)));
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
}
|
|
case "SAbsdiffI32":
|
|
result = unchecked((uint)Math.Abs((long)(int)left - (int)right));
|
|
scalarConditionCode = result != 0;
|
|
break;
|
|
case "SLshl1AddU32":
|
|
{
|
|
var wide = ((ulong)left << 1) + right;
|
|
result = (uint)wide;
|
|
scalarConditionCode = wide > uint.MaxValue;
|
|
break;
|
|
}
|
|
case "SLshl2AddU32":
|
|
{
|
|
var wide = ((ulong)left << 2) + right;
|
|
result = (uint)wide;
|
|
scalarConditionCode = wide > uint.MaxValue;
|
|
break;
|
|
}
|
|
case "SLshl3AddU32":
|
|
{
|
|
var wide = ((ulong)left << 3) + right;
|
|
result = (uint)wide;
|
|
scalarConditionCode = wide > uint.MaxValue;
|
|
break;
|
|
}
|
|
case "SLshl4AddU32":
|
|
{
|
|
var wide = ((ulong)left << 4) + right;
|
|
result = (uint)wide;
|
|
scalarConditionCode = wide > uint.MaxValue;
|
|
break;
|
|
}
|
|
case "SPackLlB32B16":
|
|
result = (left & 0xFFFFu) | (right << 16);
|
|
break;
|
|
case "SPackLhB32B16":
|
|
result = (left & 0xFFFFu) | (right & 0xFFFF0000u);
|
|
break;
|
|
case "SPackHhB32B16":
|
|
result = (left >> 16) | (right & 0xFFFF0000u);
|
|
break;
|
|
case "SMulHiU32":
|
|
result = (uint)(((ulong)left * right) >> 32);
|
|
break;
|
|
case "SMulHiI32":
|
|
result = unchecked((uint)(((long)(int)left * (int)right) >> 32));
|
|
break;
|
|
default:
|
|
error = $"unsupported-scalar-op pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
registers[destination.Value] = result;
|
|
return true;
|
|
}
|
|
|
|
private static bool TryExecuteSaveExecScalarAlu(
|
|
Gen5ShaderInstruction instruction,
|
|
uint[] registers,
|
|
ref ulong execMask,
|
|
ref bool scalarConditionCode,
|
|
out string error)
|
|
{
|
|
error = string.Empty;
|
|
if (instruction.Opcode is not (
|
|
"SAndSaveexecB64" or
|
|
"SOrSaveexecB64" or
|
|
"SXorSaveexecB64" or
|
|
"SAndn2SaveexecB64" or
|
|
"SOrn2SaveexecB64" or
|
|
"SNandSaveexecB64" or
|
|
"SNorSaveexecB64" or
|
|
"SXnorSaveexecB64" or
|
|
"SAndn1SaveexecB64" or
|
|
"SOrn1SaveexecB64"))
|
|
{
|
|
return false;
|
|
}
|
|
|
|
if (instruction.Destinations.Count != 1 ||
|
|
instruction.Destinations[0] is not
|
|
{
|
|
Kind: Gen5OperandKind.ScalarRegister,
|
|
Value: < ScalarRegisterCount - 1,
|
|
} destination ||
|
|
instruction.Sources.Count == 0 ||
|
|
!TryEvaluateScalarOperand64(
|
|
instruction.Sources[0],
|
|
registers,
|
|
execMask,
|
|
out var source))
|
|
{
|
|
error = $"scalar-source64 pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
var oldExec = execMask;
|
|
var newExec = instruction.Opcode switch
|
|
{
|
|
"SAndSaveexecB64" => oldExec & source,
|
|
"SOrSaveexecB64" => oldExec | source,
|
|
"SXorSaveexecB64" => oldExec ^ source,
|
|
"SAndn1SaveexecB64" => ~source & oldExec,
|
|
"SAndn2SaveexecB64" => source & ~oldExec,
|
|
"SOrn1SaveexecB64" => ~source | oldExec,
|
|
"SOrn2SaveexecB64" => source | ~oldExec,
|
|
"SNandSaveexecB64" => ~(source & oldExec),
|
|
"SNorSaveexecB64" => ~(source | oldExec),
|
|
_ => ~(oldExec ^ source),
|
|
};
|
|
|
|
WriteScalarPair(registers, destination.Value, oldExec, ref execMask);
|
|
execMask = MaskWaveValue(newExec);
|
|
WriteScalarPair(registers, 126, execMask, ref execMask);
|
|
scalarConditionCode = execMask != 0;
|
|
return true;
|
|
}
|
|
|
|
private static bool TryEvaluateScalarOperand64(
|
|
Gen5Operand operand,
|
|
uint[] registers,
|
|
ulong execMask,
|
|
out ulong value)
|
|
{
|
|
if (operand.Kind == Gen5OperandKind.ScalarRegister &&
|
|
operand.Value == 126)
|
|
{
|
|
value = execMask;
|
|
return true;
|
|
}
|
|
|
|
if (operand.Kind == Gen5OperandKind.ScalarRegister &&
|
|
operand.Value < ScalarRegisterCount - 1)
|
|
{
|
|
value = registers[operand.Value] | ((ulong)registers[operand.Value + 1] << 32);
|
|
return true;
|
|
}
|
|
|
|
if (TryEvaluateScalarOperand(operand, registers, out var low))
|
|
{
|
|
value = operand.Kind == Gen5OperandKind.EncodedConstant &&
|
|
operand.Value is >= 193 and <= 208
|
|
? ulong.MaxValue << 32 | low
|
|
: low;
|
|
return true;
|
|
}
|
|
|
|
value = 0;
|
|
return false;
|
|
}
|
|
|
|
private static void WriteScalarPair(
|
|
uint[] registers,
|
|
uint destination,
|
|
ulong value,
|
|
ref ulong execMask)
|
|
{
|
|
if (destination >= ScalarRegisterCount - 1)
|
|
{
|
|
return;
|
|
}
|
|
|
|
if (destination == 126)
|
|
{
|
|
value = MaskWaveValue(value);
|
|
}
|
|
|
|
registers[destination] = (uint)value;
|
|
registers[destination + 1] = (uint)(value >> 32);
|
|
if (destination == 126)
|
|
{
|
|
execMask = value;
|
|
}
|
|
}
|
|
|
|
private static ulong MaskWaveValue(ulong value) => value & RdnaWaveMask;
|
|
|
|
private static bool SignedAddOverflow(uint left, uint right, uint result) =>
|
|
((left ^ result) & (right ^ result) & 0x80000000u) != 0;
|
|
|
|
private static bool SignedSubOverflow(uint left, uint right, uint result) =>
|
|
((left ^ right) & (left ^ result) & 0x80000000u) != 0;
|
|
|
|
private static bool TryExecuteScalarCompare(
|
|
Gen5ShaderInstruction instruction,
|
|
uint[] registers,
|
|
out bool scalarConditionCode,
|
|
out string error)
|
|
{
|
|
scalarConditionCode = false;
|
|
error = string.Empty;
|
|
if (instruction.Sources.Count != 2 ||
|
|
!TryEvaluateScalarOperand(instruction.Sources[0], registers, out var left) ||
|
|
!TryEvaluateScalarOperand(instruction.Sources[1], registers, out var right))
|
|
{
|
|
error = $"scalar-compare-source pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
if (instruction.Opcode is "SBitcmp0B32" or "SBitcmp1B32")
|
|
{
|
|
var bit = (int)(right & 31u);
|
|
var isSet = ((left >> bit) & 1u) != 0;
|
|
scalarConditionCode = instruction.Opcode == "SBitcmp1B32" ? isSet : !isSet;
|
|
return true;
|
|
}
|
|
|
|
if (instruction.Opcode is "SBitcmp0B64" or "SBitcmp1B64")
|
|
{
|
|
if (!TryEvaluateScalarOperand64(instruction.Sources[0], registers, ulong.MaxValue, out var wide))
|
|
{
|
|
error = $"scalar-bitcmp-source64 pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
var bit = (int)(right & 63u);
|
|
var isSet = ((wide >> bit) & 1UL) != 0;
|
|
scalarConditionCode = instruction.Opcode == "SBitcmp1B64" ? isSet : !isSet;
|
|
return true;
|
|
}
|
|
|
|
scalarConditionCode = instruction.Opcode switch
|
|
{
|
|
"SCmpEqI32" => (int)left == (int)right,
|
|
"SCmpLgI32" => (int)left != (int)right,
|
|
"SCmpGtI32" => (int)left > (int)right,
|
|
"SCmpGeI32" => (int)left >= (int)right,
|
|
"SCmpLtI32" => (int)left < (int)right,
|
|
"SCmpLeI32" => (int)left <= (int)right,
|
|
"SCmpEqU32" => left == right,
|
|
"SCmpLgU32" => left != right,
|
|
"SCmpGtU32" => left > right,
|
|
"SCmpGeU32" => left >= right,
|
|
"SCmpLtU32" => left < right,
|
|
"SCmpLeU32" => left <= right,
|
|
_ => false,
|
|
};
|
|
if (!instruction.Opcode.StartsWith("SCmp", StringComparison.Ordinal))
|
|
{
|
|
error = $"unsupported-scalar-compare pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
private static bool TryExecuteScalarCompareK(
|
|
Gen5ShaderInstruction instruction,
|
|
uint[] registers,
|
|
out bool scalarConditionCode,
|
|
out string error)
|
|
{
|
|
scalarConditionCode = false;
|
|
error = string.Empty;
|
|
if (instruction.Destinations.Count != 1 ||
|
|
instruction.Destinations[0] is not
|
|
{
|
|
Kind: Gen5OperandKind.ScalarRegister,
|
|
Value: < ScalarRegisterCount,
|
|
} destination)
|
|
{
|
|
error = $"scalar-comparek-destination pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
var left = registers[destination.Value];
|
|
var right = unchecked((uint)(short)instruction.Sources[0].Value);
|
|
scalarConditionCode = instruction.Opcode switch
|
|
{
|
|
"SCmpkEqI32" => (int)left == (int)right,
|
|
"SCmpkLgI32" => (int)left != (int)right,
|
|
"SCmpkGtI32" => (int)left > (int)right,
|
|
"SCmpkGeI32" => (int)left >= (int)right,
|
|
"SCmpkLtI32" => (int)left < (int)right,
|
|
"SCmpkLeI32" => (int)left <= (int)right,
|
|
"SCmpkEqU32" => left == right,
|
|
"SCmpkLgU32" => left != right,
|
|
"SCmpkGtU32" => left > right,
|
|
"SCmpkGeU32" => left >= right,
|
|
"SCmpkLtU32" => left < right,
|
|
"SCmpkLeU32" => left <= right,
|
|
_ => false,
|
|
};
|
|
if (!instruction.Opcode.StartsWith("SCmpk", StringComparison.Ordinal))
|
|
{
|
|
error = $"unsupported-scalar-comparek pc=0x{instruction.Pc:X} op={instruction.Opcode}";
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
private static bool TryExecuteScalarLoad(
|
|
CpuContext ctx,
|
|
Gen5ShaderState state,
|
|
Gen5ShaderInstruction instruction,
|
|
Gen5ScalarMemoryControl control,
|
|
uint[] scalarRegisters,
|
|
List<Gen5GlobalMemoryBinding> globalMemoryBindings,
|
|
Dictionary<(uint ScalarAddress, ulong BaseAddress), Gen5GlobalMemoryBinding> globalMemoryByAddress,
|
|
HashSet<uint> runtimeScalarRegisters,
|
|
out string error)
|
|
{
|
|
error = string.Empty;
|
|
if (instruction.Sources.Count == 0 ||
|
|
instruction.Sources[0] is not
|
|
{
|
|
Kind: Gen5OperandKind.ScalarRegister,
|
|
Value: < ScalarRegisterCount - 1,
|
|
} scalarBase)
|
|
{
|
|
error = $"invalid-scalar-base pc=0x{instruction.Pc:X}";
|
|
return false;
|
|
}
|
|
|
|
var isBufferLoad =
|
|
instruction.Opcode.StartsWith("SBufferLoad", StringComparison.Ordinal);
|
|
BufferDescriptor bufferDescriptor = default;
|
|
var hasBufferDescriptor =
|
|
isBufferLoad &&
|
|
TryDecodeBufferDescriptor(
|
|
scalarRegisters,
|
|
scalarBase.Value,
|
|
strictType: false,
|
|
out bufferDescriptor);
|
|
var baseAddress = hasBufferDescriptor
|
|
? bufferDescriptor.BaseAddress
|
|
: scalarRegisters[scalarBase.Value] |
|
|
((ulong)scalarRegisters[scalarBase.Value + 1] << 32);
|
|
var dynamicOffset = control.DynamicOffsetRegister is { } offsetRegister &&
|
|
offsetRegister < ScalarRegisterCount
|
|
? scalarRegisters[offsetRegister]
|
|
: 0;
|
|
var immediateOffset = (ulong)(long)control.ImmediateOffsetBytes;
|
|
var byteOffset = unchecked(immediateOffset + dynamicOffset);
|
|
var address = unchecked(
|
|
baseAddress +
|
|
byteOffset) & ~3UL;
|
|
var bufferUnbound =
|
|
isBufferLoad &&
|
|
(!hasBufferDescriptor ||
|
|
bufferDescriptor.SizeBytes == 0 ||
|
|
(scalarRegisters[scalarBase.Value] == 0 &&
|
|
scalarRegisters[scalarBase.Value + 1] == 0 &&
|
|
scalarBase.Value + 3 < ScalarRegisterCount &&
|
|
scalarRegisters[scalarBase.Value + 2] == 0 &&
|
|
scalarRegisters[scalarBase.Value + 3] == 0));
|
|
var bufferSize = ulong.MaxValue;
|
|
if (isBufferLoad)
|
|
{
|
|
bufferSize = hasBufferDescriptor ? bufferDescriptor.SizeBytes : ulong.MaxValue;
|
|
|
|
var key = (scalarBase.Value, bufferDescriptor.BaseAddress);
|
|
if (globalMemoryByAddress.TryGetValue(key, out var existingBinding))
|
|
{
|
|
if (existingBinding.InstructionPcs is List<uint> instructionPcs) instructionPcs.Add(instruction.Pc);
|
|
}
|
|
else
|
|
{
|
|
TryReadGlobalMemory(ctx, bufferDescriptor.BaseAddress, bufferDescriptor.SizeBytes, out var data);
|
|
var binding = new Gen5GlobalMemoryBinding(scalarBase.Value, bufferDescriptor.BaseAddress, new List<uint> { instruction.Pc }, data);
|
|
globalMemoryByAddress.Add(key, binding);
|
|
globalMemoryBindings.Add(binding);
|
|
}
|
|
}
|
|
else if (baseAddress != 0)
|
|
{
|
|
var key = (scalarBase.Value, baseAddress);
|
|
if (globalMemoryByAddress.TryGetValue(key, out var existingBinding))
|
|
{
|
|
if (existingBinding.InstructionPcs is List<uint> instructionPcs)
|
|
{
|
|
instructionPcs.Add(instruction.Pc);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
var requiredBytes = Math.Max(
|
|
256UL * 1024UL,
|
|
checked(
|
|
byteOffset +
|
|
(ulong)Math.Max(instruction.Destinations.Count, 1) *
|
|
sizeof(uint)));
|
|
requiredBytes = Math.Min(
|
|
(requiredBytes + 4095UL) & ~4095UL,
|
|
MaxGlobalMemoryBindingBytes);
|
|
if (!TryReadGlobalMemory(
|
|
ctx,
|
|
baseAddress,
|
|
requiredBytes,
|
|
out var data))
|
|
{
|
|
data = [];
|
|
}
|
|
|
|
var binding = new Gen5GlobalMemoryBinding(
|
|
scalarBase.Value,
|
|
baseAddress,
|
|
new List<uint> { instruction.Pc },
|
|
data);
|
|
globalMemoryByAddress.Add(key, binding);
|
|
globalMemoryBindings.Add(binding);
|
|
}
|
|
}
|
|
|
|
if (!bufferUnbound && address == 0)
|
|
{
|
|
error = FormatScalarLoadError(
|
|
"invalid-load-address",
|
|
instruction,
|
|
scalarBase.Value,
|
|
scalarRegisters,
|
|
control,
|
|
baseAddress,
|
|
dynamicOffset,
|
|
address);
|
|
return false;
|
|
}
|
|
|
|
for (var index = 0; index < instruction.Destinations.Count; index++)
|
|
{
|
|
var destination = instruction.Destinations[index];
|
|
if (destination.Kind != Gen5OperandKind.ScalarRegister ||
|
|
destination.Value >= ScalarRegisterCount)
|
|
{
|
|
error = FormatScalarLoadError(
|
|
"invalid-scalar-destination",
|
|
instruction,
|
|
scalarBase.Value,
|
|
scalarRegisters,
|
|
control,
|
|
baseAddress,
|
|
dynamicOffset,
|
|
address);
|
|
return false;
|
|
}
|
|
|
|
var componentOffset = unchecked(byteOffset + (ulong)(index * sizeof(uint)));
|
|
if (bufferUnbound ||
|
|
isBufferLoad &&
|
|
(componentOffset >= bufferSize ||
|
|
bufferSize - componentOffset < sizeof(uint)))
|
|
{
|
|
scalarRegisters[destination.Value] = 0;
|
|
continue;
|
|
}
|
|
|
|
if (!ctx.TryReadUInt32(
|
|
address + (ulong)(index * sizeof(uint)),
|
|
out var value) &&
|
|
!TryReadUserDataScalarLoad(
|
|
state,
|
|
instruction,
|
|
control,
|
|
byteOffset,
|
|
index,
|
|
out value))
|
|
{
|
|
if (isBufferLoad)
|
|
{
|
|
scalarRegisters[destination.Value] = 0;
|
|
continue;
|
|
}
|
|
|
|
error = FormatScalarLoadError(
|
|
"scalar-load-failed",
|
|
instruction,
|
|
scalarBase.Value,
|
|
scalarRegisters,
|
|
control,
|
|
baseAddress,
|
|
dynamicOffset,
|
|
address);
|
|
return false;
|
|
}
|
|
|
|
scalarRegisters[destination.Value] = value;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
private static bool TryDecodeBufferDescriptor(
|
|
IReadOnlyList<uint> scalarRegisters,
|
|
uint scalarBase,
|
|
bool strictType,
|
|
out BufferDescriptor descriptor)
|
|
{
|
|
descriptor = default;
|
|
if (scalarBase + 3 >= scalarRegisters.Count)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
var word0 = scalarRegisters[(int)scalarBase];
|
|
var word1 = scalarRegisters[(int)scalarBase + 1];
|
|
var word2 = scalarRegisters[(int)scalarBase + 2];
|
|
var word3 = scalarRegisters[(int)scalarBase + 3];
|
|
if (word0 == 0 &&
|
|
word1 == 0 &&
|
|
word2 == 0 &&
|
|
word3 == 0)
|
|
{
|
|
descriptor = new BufferDescriptor(0, 0, 0, 0, 0, 0);
|
|
return true;
|
|
}
|
|
|
|
var type = word3 >> 30;
|
|
if (type != 0)
|
|
{
|
|
if (strictType)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
descriptor = new BufferDescriptor(0, 0, 0, 0, 0, 0);
|
|
return true;
|
|
}
|
|
|
|
var baseAddress = word0 | ((ulong)(word1 & 0xFFFFu) << 32);
|
|
var stride = (word1 >> 16) & 0x3FFFu;
|
|
var unifiedFormat = (word3 >> 12) & 0x7Fu;
|
|
var (dataFormat, numberFormat) =
|
|
DecodeGfx10BufferFormat(unifiedFormat);
|
|
var sizeBytes = stride == 0
|
|
? word2
|
|
: (ulong)stride * word2;
|
|
descriptor = new BufferDescriptor(baseAddress, stride, word2, sizeBytes, numberFormat, dataFormat);
|
|
return true;
|
|
}
|
|
|
|
private static (uint DataFormat, uint NumberFormat)
|
|
DecodeGfx10BufferFormat(uint format) =>
|
|
format switch
|
|
{
|
|
0 => (0, 0),
|
|
>= 1 and <= 6 => (1, format - 1),
|
|
>= 7 and <= 13 => (2, DecodeUnifiedNumber(format - 7, 7)),
|
|
>= 14 and <= 19 => (3, format - 14),
|
|
>= 20 and <= 22 => (4, DecodeIntegerOrFloatNumber(format - 20)),
|
|
>= 23 and <= 29 => (5, DecodeUnifiedNumber(format - 23, 7)),
|
|
>= 30 and <= 36 => (6, DecodeUnifiedNumber(format - 30, 7)),
|
|
>= 37 and <= 43 => (7, DecodeUnifiedNumber(format - 37, 7)),
|
|
>= 44 and <= 49 => (8, format - 44),
|
|
>= 50 and <= 55 => (9, format - 50),
|
|
>= 56 and <= 61 => (10, format - 56),
|
|
>= 62 and <= 64 => (11, DecodeIntegerOrFloatNumber(format - 62)),
|
|
>= 65 and <= 71 => (12, DecodeUnifiedNumber(format - 65, 7)),
|
|
>= 72 and <= 74 => (13, DecodeIntegerOrFloatNumber(format - 72)),
|
|
>= 75 and <= 77 => (14, DecodeIntegerOrFloatNumber(format - 75)),
|
|
128 => (1, 9),
|
|
129 => (3, 9),
|
|
130 => (10, 9),
|
|
132 => (34, 7),
|
|
133 => (16, 0),
|
|
134 => (17, 0),
|
|
135 => (18, 0),
|
|
136 => (19, 0),
|
|
140 => (4, 7),
|
|
_ => (0, 0),
|
|
};
|
|
|
|
private static uint DecodeUnifiedNumber(uint offset, uint formatCount) =>
|
|
offset == formatCount - 1 ? 7u : offset;
|
|
|
|
private static uint DecodeIntegerOrFloatNumber(uint offset) =>
|
|
offset switch
|
|
{
|
|
0 => 4,
|
|
1 => 5,
|
|
_ => 7,
|
|
};
|
|
|
|
private static bool TryReadUserDataScalarLoad(
|
|
Gen5ShaderState state,
|
|
Gen5ShaderInstruction instruction,
|
|
Gen5ScalarMemoryControl control,
|
|
ulong byteOffset,
|
|
int componentIndex,
|
|
out uint value)
|
|
{
|
|
value = 0;
|
|
if (!instruction.Opcode.StartsWith("SLoadDword", StringComparison.Ordinal) ||
|
|
state.Metadata is not { } metadata ||
|
|
(byteOffset & 3) != 0)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
var baseDwordOffset = byteOffset >> 2;
|
|
if (baseDwordOffset > int.MaxValue)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
var dwordOffset = (long)baseDwordOffset + componentIndex;
|
|
if (dwordOffset < 0 ||
|
|
dwordOffset >= state.UserData.Count ||
|
|
!IsShaderUserDataResourceOffset(metadata, (uint)dwordOffset))
|
|
{
|
|
return false;
|
|
}
|
|
|
|
value = state.UserData[(int)dwordOffset];
|
|
return true;
|
|
}
|
|
|
|
private static bool IsShaderUserDataResourceOffset(
|
|
Gen5ShaderMetadata metadata,
|
|
uint dwordOffset)
|
|
{
|
|
if (dwordOffset < metadata.ShaderResourceTableSizeDwords)
|
|
{
|
|
return true;
|
|
}
|
|
|
|
foreach (var resource in metadata.Resources)
|
|
{
|
|
var dwordCount = resource.Kind switch
|
|
{
|
|
Gen5ShaderResourceKind.ReadOnlyTexture or
|
|
Gen5ShaderResourceKind.ReadWriteTexture => 8u,
|
|
Gen5ShaderResourceKind.Sampler or
|
|
Gen5ShaderResourceKind.ConstantBuffer => 4u,
|
|
_ => 1u,
|
|
};
|
|
if (dwordOffset >= resource.OffsetDwords &&
|
|
dwordOffset < resource.OffsetDwords + dwordCount)
|
|
{
|
|
return true;
|
|
}
|
|
}
|
|
|
|
return metadata.DirectResources.Values.Any(offset => offset == dwordOffset);
|
|
}
|
|
|
|
private static string FormatScalarLoadError(
|
|
string reason,
|
|
Gen5ShaderInstruction instruction,
|
|
uint scalarBase,
|
|
uint[] scalarRegisters,
|
|
Gen5ScalarMemoryControl control,
|
|
ulong baseAddress,
|
|
uint dynamicOffset,
|
|
ulong address)
|
|
{
|
|
var high = scalarBase + 1 < scalarRegisters.Length
|
|
? scalarRegisters[scalarBase + 1]
|
|
: 0;
|
|
var dynamic = control.DynamicOffsetRegister is { } register
|
|
? $" dyn=s{register}=0x{dynamicOffset:X8}"
|
|
: " dyn=none";
|
|
var descriptor = string.Join(
|
|
':',
|
|
Enumerable.Range(0, 4).Select(index =>
|
|
scalarBase + index < scalarRegisters.Length
|
|
? $"{scalarRegisters[scalarBase + index]:X8}"
|
|
: "????????"));
|
|
var words = string.Join(',', instruction.Words.Select(word => $"{word:X8}"));
|
|
return
|
|
$"{reason} pc=0x{instruction.Pc:X} op={instruction.Opcode} " +
|
|
$"words=[{words}] base=s{scalarBase}[0x{scalarRegisters[scalarBase]:X8}:0x{high:X8}] " +
|
|
$"desc=[{descriptor}] " +
|
|
$"base_addr=0x{baseAddress:X16} imm={control.ImmediateOffsetBytes}" +
|
|
$"{dynamic} address=0x{address:X16}";
|
|
}
|
|
|
|
private static bool TryEvaluateScalarOperand(
|
|
Gen5Operand operand,
|
|
uint[] scalarRegisters,
|
|
out uint value)
|
|
{
|
|
if (operand.Kind == Gen5OperandKind.ScalarRegister &&
|
|
operand.Value < ScalarRegisterCount)
|
|
{
|
|
value = scalarRegisters[operand.Value];
|
|
return true;
|
|
}
|
|
|
|
if (operand.Kind == Gen5OperandKind.LiteralConstant)
|
|
{
|
|
value = operand.Value;
|
|
return true;
|
|
}
|
|
|
|
if (operand.Kind == Gen5OperandKind.EncodedConstant)
|
|
{
|
|
return TryDecodeInlineConstant(operand.Value, out value);
|
|
}
|
|
|
|
value = 0;
|
|
return false;
|
|
}
|
|
|
|
private static bool TryDecodeInlineConstant(uint encoded, out uint value)
|
|
{
|
|
if (encoded == 125)
|
|
{
|
|
value = 0;
|
|
return true;
|
|
}
|
|
|
|
if (encoded is >= 128 and <= 192)
|
|
{
|
|
value = encoded - 128;
|
|
return true;
|
|
}
|
|
|
|
if (encoded is >= 193 and <= 208)
|
|
{
|
|
value = unchecked((uint)-(int)(encoded - 192));
|
|
return true;
|
|
}
|
|
|
|
var floatingPoint = encoded switch
|
|
{
|
|
240 => 0.5f,
|
|
241 => -0.5f,
|
|
242 => 1.0f,
|
|
243 => -1.0f,
|
|
244 => 2.0f,
|
|
245 => -2.0f,
|
|
246 => 4.0f,
|
|
247 => -4.0f,
|
|
248 => 1.0f / (2.0f * MathF.PI),
|
|
_ => float.NaN,
|
|
};
|
|
if (float.IsNaN(floatingPoint))
|
|
{
|
|
value = 0;
|
|
return false;
|
|
}
|
|
|
|
value = BitConverter.SingleToUInt32Bits(floatingPoint);
|
|
return true;
|
|
}
|
|
|
|
private static uint ReverseBits(uint value)
|
|
{
|
|
value = (value >> 1 & 0x55555555u) | ((value & 0x55555555u) << 1);
|
|
value = (value >> 2 & 0x33333333u) | ((value & 0x33333333u) << 2);
|
|
value = (value >> 4 & 0x0F0F0F0Fu) | ((value & 0x0F0F0F0Fu) << 4);
|
|
value = (value >> 8 & 0x00FF00FFu) | ((value & 0x00FF00FFu) << 8);
|
|
return value >> 16 | value << 16;
|
|
}
|
|
|
|
private static bool TryCopyRegisters(
|
|
uint[] registers,
|
|
uint start,
|
|
int count,
|
|
out IReadOnlyList<uint> values)
|
|
{
|
|
values = [];
|
|
if (start > (uint)(registers.Length - count))
|
|
{
|
|
return false;
|
|
}
|
|
|
|
var copy = new uint[count];
|
|
Array.Copy(registers, (int)start, copy, 0, count);
|
|
values = copy;
|
|
return true;
|
|
}
|
|
|
|
private static bool UsesSampler(string opcode) =>
|
|
opcode.StartsWith("ImageSample", StringComparison.Ordinal) ||
|
|
opcode.StartsWith("ImageGather", StringComparison.Ordinal);
|
|
|
|
}
|