feat(gpu): GPU compute detile for guest tiled textures (Vulkan + Metal) (#592)

* feat(gpu): GPU compute detile for guest tiled textures (Vulkan + Metal)

Move RDNA2 exact-XOR deswizzle (swizzle modes 5/9/24/27, 4bpp) off the CPU
onto a GPU compute pass. GnmTiling.GetDetileParams resolves the shared
addressing into DetileParams; the CPU fallback and both GPU kernels consume
the same params so they never disagree.

Vulkan (verified bit-exact on NVIDIA): SpirvFixedShaders.CreateDetileCompute
hand-emits the SPIR-V kernel; VulkanDetilePass.RecordDetile records the
dispatch into the async batch command buffer (never a blocking submit on the
render thread) with transients retired via fence; VulkanDetileSelfTest
(SHARPEMU_DETILE_SELFTEST=1) checks both entry points against the CPU detile.

Metal (Mac-untested): detile_compute.msl (detile_cs) + MetalDetilePass mirror
the Vulkan pass. The active Metal path CPU-detiles via the new
GnmTiling.DetileWithParams when a texture arrives packaged (empty RgbaPixels +
TiledSource/Detile), keeping Metal correct under default-on with no regression;
wiring MetalDetilePass live is the remaining on-device step.

Flags: GPU detile is default-on (SHARPEMU_GPU_DETILE=0 disables);
[GPU-DETILE] diagnostics gated behind SHARPEMU_LOG_GPU_DETILE=1.

Tests: 17 detile unit tests pass, incl. DetileWithParams and GetDetileParams
each matching TryDetile bit-for-bit across all supported modes/bpp, plus a
SPIR-V structural-validity test.

* feat(gpu): GPU compute detile for guest tiled textures (Vulkan + Metal)

Move RDNA2 exact-XOR deswizzle (swizzle modes 5/9/24/27, 4bpp) off the CPU
onto a GPU compute pass. GnmTiling.GetDetileParams resolves the shared
addressing into DetileParams that the CPU fallback and both GPU kernels
consume, so they never disagree; everything else keeps the CPU path.

Vulkan (verified bit-exact on NVIDIA): SpirvFixedShaders.CreateDetileCompute
hand-emits the kernel; VulkanDetilePass.RecordDetile records into the async
batch command buffer (never a blocking submit on the render thread) with
transients retired via fence, falling back to CPU detile on failure.
VulkanDetileSelfTest (SHARPEMU_DETILE_SELFTEST=1) checks both entry points.

Metal (Mac-untested): detile_compute.msl + MetalDetilePass mirror the Vulkan
pass; the active Metal path CPU-detiles via GnmTiling.DetileWithParams so it
stays correct under default-on. Wiring MetalDetilePass live is a follow-up.

Flags: default-on (SHARPEMU_GPU_DETILE=0 disables); diagnostics behind
SHARPEMU_LOG_GPU_DETILE=1. Adds 17 passing detile unit tests.

* Fix: added support layered texture support for the GPU-Detiling.

* Fix: Added support for BlockTable (1 / 4 / 8 (Morton/Z-order))

* feat: added support for 8 and 16 bpp (bytes per element)

* Fixed a build failure specific to this branch

---------
This commit is contained in:
shadowbeat070
2026-07-24 19:13:02 +02:00
committed by GitHub
parent 5228335f15
commit a158960c20
13 changed files with 2702 additions and 27 deletions
@@ -0,0 +1,102 @@
// Copyright (C) 2026 SharpEmu Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
using System.Buffers.Binary;
using SharpEmu.ShaderCompiler.Vulkan;
using Xunit;
namespace SharpEmu.Libs.Tests.Agc;
// Structural validation of the GPU detile compute kernel. This cannot run the
// shader without a Vulkan device, but it pins the SPIR-V is well-formed: the
// header is correct, every instruction's word count sums to exactly the module
// length (the classic hand-emit bug), and the compute-specific pieces are
// present (a GLCompute entry point, a LocalSize execution mode, and a runtime
// array for the storage buffers). Full pixel correctness is verified on a GPU.
public sealed class DetileComputeSpirvTests
{
private const uint SpirvMagic = 0x07230203;
private const uint SpirvVersion15 = 0x00010500;
private const ushort OpEntryPoint = 15;
private const ushort OpExecutionMode = 16;
private const ushort OpTypeRuntimeArray = 29;
private const ushort OpFunction = 54;
private const ushort OpFunctionEnd = 56;
private const uint ExecutionModelGLCompute = 5;
private const uint ExecutionModeLocalSize = 17;
[Fact]
public void CreateDetileCompute_EmitsWellFormedComputeModule()
{
var spirv = SpirvFixedShaders.CreateDetileCompute();
Assert.True(spirv.Length % sizeof(uint) == 0, "SPIR-V must be a whole number of words.");
var words = new uint[spirv.Length / sizeof(uint)];
for (var i = 0; i < words.Length; i++)
{
words[i] = BinaryPrimitives.ReadUInt32LittleEndian(spirv.AsSpan(i * sizeof(uint)));
}
Assert.True(words.Length > 5, "Module must have a header plus instructions.");
Assert.Equal(SpirvMagic, words[0]);
Assert.Equal(SpirvVersion15, words[1]);
var bound = words[3];
Assert.True(bound > 1, "Id bound must be set.");
var sawComputeEntry = false;
var sawLocalSize = false;
var sawRuntimeArray = false;
var functionCount = 0;
var functionEndCount = 0;
var offset = 5;
while (offset < words.Length)
{
var word = words[offset];
var wordCount = (int)(word >> 16);
var opcode = (ushort)(word & 0xFFFF);
Assert.True(wordCount >= 1, $"Instruction at {offset} has a zero word count.");
Assert.True(
offset + wordCount <= words.Length,
$"Instruction at {offset} (op {opcode}, wc {wordCount}) overruns the module.");
switch (opcode)
{
case OpEntryPoint when words[offset + 1] == ExecutionModelGLCompute:
sawComputeEntry = true;
break;
case OpExecutionMode
when wordCount >= 6 &&
words[offset + 2] == ExecutionModeLocalSize &&
words[offset + 3] == 8 &&
words[offset + 4] == 8 &&
words[offset + 5] == 1:
sawLocalSize = true;
break;
case OpTypeRuntimeArray:
sawRuntimeArray = true;
break;
case OpFunction:
functionCount++;
break;
case OpFunctionEnd:
functionEndCount++;
break;
}
offset += wordCount;
}
// Word counts must tile the module exactly — a wrong length lands here.
Assert.Equal(words.Length, offset);
Assert.True(sawComputeEntry, "Missing a GLCompute OpEntryPoint.");
Assert.True(sawLocalSize, "Missing an 8x8x1 LocalSize execution mode.");
Assert.True(sawRuntimeArray, "Missing a runtime array (storage buffers).");
Assert.Equal(1, functionCount);
Assert.Equal(1, functionEndCount);
}
}
@@ -83,4 +83,152 @@ public sealed class GnmTilingDetileTests
Assert.Equal((ushort)i, value);
}
}
// GetDetileParams must reproduce TryDetile bit-for-bit: the CPU fallback and
// the GPU compute kernel both consume these params, so a detile driven purely
// by DetileParams (the shared addressing formula the kernel runs) must equal
// the shipped CPU detile for every supported mode/bpp.
[Theory]
[InlineData(27u, 2, 384, 200)] // 64 KiB RB+ R_X (exact-XOR)
[InlineData(27u, 4, 256, 256)] // 64 KiB RB+ R_X (exact-XOR)
[InlineData(9u, 4, 300, 300)] // 64 KiB standard (exact-XOR)
[InlineData(24u, 4, 128, 256)] // 64 KiB RB+ Z_X (exact-XOR)
[InlineData(5u, 4, 200, 120)] // 4 KiB standard (exact-XOR)
[InlineData(8u, 4, 128, 128)] // 64 KiB Z (block-table path)
[InlineData(1u, 4, 64, 64)] // 256 B standard (block-table path)
public void GetDetileParams_ReproducesTryDetile(uint mode, int bpp, int w, int h)
{
var p = GnmTiling.GetDetileParams(mode, bpp, w, h);
Assert.True(p.IsSupported);
// Whole-block tiled buffer (block addressing overshoots the linear extent),
// filled with a deterministic non-trivial pattern.
var blocksHigh = (h + p.BlockHeight - 1) / p.BlockHeight;
var tiled = new byte[(long)p.BlocksPerRow * blocksHigh * p.BlockBytes];
for (var i = 0; i < tiled.Length; i++)
{
tiled[i] = (byte)((i * 31 + 7) & 0xFF);
}
var expected = new byte[w * h * bpp];
Assert.True(GnmTiling.TryDetile(tiled, expected, mode, w, h, bpp));
var actual = DetileViaParams(tiled, p, w, h, bpp);
Assert.Equal(expected, actual);
}
// The production GnmTiling.DetileWithParams (the active CPU fallback used by
// the Metal path under default-on GPU detile) must equal TryDetile for every
// supported mode/bpp — same DetileParams addressing, no re-derived swizzle.
[Theory]
[InlineData(27u, 2, 384, 200)]
[InlineData(27u, 4, 256, 256)]
[InlineData(9u, 4, 300, 300)]
[InlineData(24u, 4, 128, 256)]
[InlineData(5u, 4, 200, 120)]
[InlineData(8u, 4, 128, 128)]
[InlineData(1u, 4, 64, 64)]
[InlineData(27u, 8, 256, 256)] // 8bpp (GPU: 2 words/element)
[InlineData(27u, 16, 128, 128)] // 16bpp (GPU: 4 words/element)
[InlineData(9u, 8, 128, 96)]
[InlineData(8u, 16, 64, 64)] // block-table, 16bpp
public void DetileWithParams_MatchesTryDetile(uint mode, int bpp, int w, int h)
{
var p = GnmTiling.GetDetileParams(mode, bpp, w, h);
Assert.True(p.IsSupported);
var blocksHigh = (h + p.BlockHeight - 1) / p.BlockHeight;
var tiled = new byte[(long)p.BlocksPerRow * blocksHigh * p.BlockBytes];
for (var i = 0; i < tiled.Length; i++)
{
tiled[i] = (byte)((i * 31 + 7) & 0xFF);
}
var expected = new byte[w * h * bpp];
Assert.True(GnmTiling.TryDetile(tiled, expected, mode, w, h, bpp));
var actual = new byte[w * h * bpp];
Assert.True(GnmTiling.DetileWithParams(p, tiled, actual));
Assert.Equal(expected, actual);
}
// Array textures are packed as contiguous tiled slices and detiled one slice
// per layer (dispatch-Z on the GPU; a per-layer loop in the CPU fallbacks)
// into a layer-major linear buffer. This pins that packing: each slice must
// deswizzle into its own region and match a per-slice TryDetile, and a
// per-layer-distinct pattern catches any slice cross-talk.
[Theory]
[InlineData(27u, 4, 256, 256, 3)]
[InlineData(9u, 4, 128, 96, 2)]
[InlineData(24u, 4, 64, 128, 4)]
public void DetileWithParams_MultiLayer_MatchesPerSliceTryDetile(uint mode, int bpp, int w, int h, int layers)
{
var p = GnmTiling.GetDetileParams(mode, bpp, w, h);
Assert.True(p.IsSupported);
var blocksHigh = (h + p.BlockHeight - 1) / p.BlockHeight;
var sliceTiledBytes = (int)((long)p.BlocksPerRow * blocksHigh * p.BlockBytes);
var sliceLinearBytes = w * h * bpp;
var tiled = new byte[sliceTiledBytes * layers];
for (var layer = 0; layer < layers; layer++)
{
for (var i = 0; i < sliceTiledBytes; i++)
{
tiled[layer * sliceTiledBytes + i] = (byte)((i * 31 + 7 + layer * 101) & 0xFF);
}
}
// Expected: each slice detiled independently via the shipped CPU detile.
var expected = new byte[sliceLinearBytes * layers];
for (var layer = 0; layer < layers; layer++)
{
Assert.True(GnmTiling.TryDetile(
tiled.AsSpan(layer * sliceTiledBytes, sliceTiledBytes),
expected.AsSpan(layer * sliceLinearBytes, sliceLinearBytes),
mode, w, h, bpp));
}
// Actual: the layer-major loop the Vulkan/Metal CPU fallbacks run.
var actual = new byte[sliceLinearBytes * layers];
for (var layer = 0; layer < layers; layer++)
{
Assert.True(GnmTiling.DetileWithParams(
p,
tiled.AsSpan(layer * sliceTiledBytes, sliceTiledBytes),
actual.AsSpan(layer * sliceLinearBytes, sliceLinearBytes)));
}
Assert.Equal(expected, actual);
}
// Reference detile driven entirely by DetileParams — the single shared
// addressing formula the Vulkan/Metal compute kernel will run per texel.
private static byte[] DetileViaParams(byte[] tiled, DetileParams p, int w, int h, int bpp)
{
var linear = new byte[w * h * bpp];
for (var y = 0; y < h; y++)
{
for (var x = 0; x < w; x++)
{
var blockX = x / p.BlockWidth;
var blockY = y / p.BlockHeight;
var inX = x % p.BlockWidth;
var inY = y % p.BlockHeight;
var inBlockByte = p.Equation == DetileEquation.ExactXor
? p.XByteTerm[x & p.XMask] ^ p.YByteTerm[y & p.YMask]
: p.BlockTable[inY * p.BlockWidth + inX] * p.BytesPerElement;
var srcByte = ((long)blockY * p.BlocksPerRow + blockX) * p.BlockBytes + inBlockByte;
var dstByte = ((long)y * w + x) * bpp;
if (srcByte < 0 || srcByte + bpp > tiled.Length)
{
continue;
}
Array.Copy(tiled, srcByte, linear, dstByte, bpp);
}
}
return linear;
}
}