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[AGC/Vulkan] Extend PS5 runtime and rendering compatibility (#216)
* [Core] Add POSIX native execution and PS5 SELF support Extend the native backend, guest TLS, fixed-address memory, and loader paths needed by PS5 titles on Windows, Linux, and macOS. Keep workstation GC so high-core-count hosts do not reserve over fixed guest image bases. * [HLE] Expand PS5 service and media compatibility Add the kernel, threading, save-data, networking, audio, video-codec, font, dialog, and service exports required by newer PS5 software. Preserve every SysAbi NID currently registered by main while adding the compatibility surface used by ASTRO BOT. * [AGC/Vulkan] Extend Gen5 shader and presentation support Expand PM4 handling, Gen5 shader translation, MRT and packed export support, guest image tracking, depth initialization, texture aliasing, and Vulkan presentation. Add the performance overlay and address-filtered diagnostics used to validate ASTRO BOT with original shaders. * [Core] Align static TLS reservation across hosts * [Pad] Align primary user ID with UserService * [Gpu] Preserve runtime scalar buffers across renderer seam * [AGC] Restore omitted command helper exports * [Vulkan] Reuse primary views for promoted MRT targets * [Vulkan] Preserve scratch storage bindings in compute dispatches
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// Copyright (C) 2026 SharpEmu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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using SharpEmu.HLE;
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using System.Buffers.Binary;
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using System.Collections.Concurrent;
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using System.Threading;
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namespace SharpEmu.Libs.Audio;
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public static class AjmExports
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{
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private static readonly ConcurrentDictionary<uint, byte> Contexts = new();
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private static int _nextContextId;
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public static int AjmInitialize(CpuContext ctx)
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{
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var reserved = ctx[CpuRegister.Rdi];
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var outputAddress = ctx[CpuRegister.Rsi];
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if (reserved != 0 || outputAddress == 0)
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{
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return unchecked((int)0x806A0001);
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}
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var contextId = unchecked((uint)Interlocked.Increment(ref _nextContextId));
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Span<byte> value = stackalloc byte[sizeof(uint)];
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BinaryPrimitives.WriteUInt32LittleEndian(value, contextId);
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if (!ctx.Memory.TryWrite(outputAddress, value))
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{
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return unchecked((int)0x806A0001);
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}
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Contexts[contextId] = 0;
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if (string.Equals(Environment.GetEnvironmentVariable("SHARPEMU_LOG_AJM"), "1", StringComparison.Ordinal))
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{
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Console.Error.WriteLine(
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$"[LOADER][TRACE] ajm.initialize reserved={reserved} out=0x{outputAddress:X16} context={contextId}");
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}
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ctx[CpuRegister.Rax] = 0;
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return 0;
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}
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[SysAbiExport(
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Nid = "MHur6qCsUus",
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ExportName = "sceAjmFinalize",
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Target = Generation.Gen4 | Generation.Gen5,
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LibraryName = "libSceAjm")]
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public static int AjmFinalize(CpuContext ctx)
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{
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Contexts.TryRemove(unchecked((uint)ctx[CpuRegister.Rdi]), out _);
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ctx[CpuRegister.Rax] = 0;
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return 0;
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}
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[SysAbiExport(
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Nid = "Q3dyFuwGn64",
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ExportName = "sceAjmModuleRegister",
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Target = Generation.Gen4 | Generation.Gen5,
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LibraryName = "libSceAjm")]
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public static int AjmModuleRegister(CpuContext ctx)
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{
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var contextId = unchecked((uint)ctx[CpuRegister.Rdi]);
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var codecType = unchecked((uint)ctx[CpuRegister.Rsi]);
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var reserved = ctx[CpuRegister.Rdx];
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if (reserved != 0 || !Contexts.ContainsKey(contextId))
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{
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return unchecked((int)0x806A0001);
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}
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if (string.Equals(Environment.GetEnvironmentVariable("SHARPEMU_LOG_AJM"), "1", StringComparison.Ordinal))
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{
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Console.Error.WriteLine(
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$"[LOADER][TRACE] ajm.module_register context={contextId} codec={codecType} reserved={reserved}");
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}
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ctx[CpuRegister.Rax] = 0;
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return 0;
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}
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[SysAbiExport(
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Nid = "Wi7DtlLV+KI",
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ExportName = "sceAjmModuleUnregister",
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Target = Generation.Gen4 | Generation.Gen5,
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LibraryName = "libSceAjm")]
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public static int AjmModuleUnregister(CpuContext ctx)
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{
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ctx[CpuRegister.Rax] = 0;
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return 0;
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}
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[SysAbiExport(
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Nid = "MmpF1XsQiHw",
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ExportName = "sceAjmBatchInitialize",
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Target = Generation.Gen4 | Generation.Gen5,
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LibraryName = "libSceAjm")]
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public static int AjmBatchInitialize(CpuContext ctx)
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{
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// The caller owns and initializes the batch storage. This API resets
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// its submission cursor on hardware; FMOD does not consume a return
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// value or an additional output object here.
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ctx[CpuRegister.Rax] = 0;
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return 0;
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}
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}
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