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test: add Fiber exports contract tests (13 tests) (#428)
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kostyaff
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// Copyright (C) 2026 SharpEmu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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using System.Buffers.Binary;
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using SharpEmu.HLE;
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using SharpEmu.Libs.Fiber;
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using Xunit;
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namespace SharpEmu.Libs.Tests.Fiber;
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/// <summary>
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/// Contract tests for the libSceFiber HLE exports. These pin the current
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/// validation and layout behaviour of <see cref="FiberExports"/>; they do not
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/// exercise a live guest thread scheduler.
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/// </summary>
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public sealed class FiberExportsTests
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{
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private const ulong Base = 0x3_0000_0000UL;
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private const int RegionSize = 0x2000;
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private const int ErrorNull = unchecked((int)0x80590001);
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private const int ErrorAlignment = unchecked((int)0x80590002);
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private const int ErrorRange = unchecked((int)0x80590003);
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private const int ErrorInvalid = unchecked((int)0x80590004);
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private const int ErrorPermission = unchecked((int)0x80590005);
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private const uint SignatureStart = 0xDEF1649Cu;
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private const uint SignatureEnd = 0xB37592A0u;
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private const ulong StackSignature = 0x7149F2CA7149F2CAUL;
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private const uint StateIdle = 2;
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private const ulong FiberAddress = Base;
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private const ulong NameAddress = Base + 0x200;
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private const ulong ContextAddress = Base + 0x400;
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private const ulong EntryAddress = 0x4_0000_1000UL;
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private const ulong InfoAddress = Base + 0x800;
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public FiberExportsTests()
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{
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FiberExports.ResetRuntimeState();
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}
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[Fact]
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public void OptParamInitialize_NullParam_ReturnsNullError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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context[CpuRegister.Rdi] = 0;
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var result = FiberExports.FiberOptParamInitialize(context);
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Assert.Equal(ErrorNull, result);
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}
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[Fact]
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public void GetSelf_NullOutAddress_ReturnsNullError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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context[CpuRegister.Rdi] = 0;
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var result = FiberExports.FiberGetSelf(context);
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Assert.Equal(ErrorNull, result);
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}
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[Fact]
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public void GetSelf_OutsideFiberContext_ReturnsPermissionError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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context[CpuRegister.Rdi] = Base + 0x100;
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var result = FiberExports.FiberGetSelf(context);
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Assert.Equal(ErrorPermission, result);
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}
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[Fact]
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public void GetInfo_NullInfo_ReturnsNullError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = 0;
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var result = FiberExports.FiberGetInfo(context);
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Assert.Equal(ErrorNull, result);
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}
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[Fact]
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public void Initialize_NullFiber_ReturnsNullError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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WriteCString(memory, NameAddress, "F");
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context[CpuRegister.Rdi] = 0;
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context[CpuRegister.Rsi] = NameAddress;
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context[CpuRegister.Rdx] = EntryAddress;
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var result = FiberExports.FiberInitialize(context);
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Assert.Equal(ErrorNull, result);
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}
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[Fact]
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public void Initialize_NullName_ReturnsNullError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = 0;
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context[CpuRegister.Rdx] = EntryAddress;
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var result = FiberExports.FiberInitialize(context);
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Assert.Equal(ErrorNull, result);
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}
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[Fact]
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public void Initialize_NullEntry_ReturnsNullError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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WriteCString(memory, NameAddress, "F");
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = NameAddress;
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context[CpuRegister.Rdx] = 0;
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var result = FiberExports.FiberInitialize(context);
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Assert.Equal(ErrorNull, result);
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}
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[Fact]
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public void Initialize_MisalignedFiber_ReturnsAlignmentError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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WriteCString(memory, NameAddress, "F");
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context[CpuRegister.Rdi] = FiberAddress + 4;
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context[CpuRegister.Rsi] = NameAddress;
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context[CpuRegister.Rdx] = EntryAddress;
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var result = FiberExports.FiberInitialize(context);
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Assert.Equal(ErrorAlignment, result);
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}
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[Fact]
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public void Initialize_TooSmallContextSize_ReturnsRangeError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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WriteCString(memory, NameAddress, "F");
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = NameAddress;
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context[CpuRegister.Rdx] = EntryAddress;
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context[CpuRegister.R8] = ContextAddress;
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context[CpuRegister.R9] = 256;
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var result = FiberExports.FiberInitialize(context);
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Assert.Equal(ErrorRange, result);
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}
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[Fact]
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public void Initialize_ContextAddressWithoutSize_ReturnsInvalidError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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WriteCString(memory, NameAddress, "F");
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = NameAddress;
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context[CpuRegister.Rdx] = EntryAddress;
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context[CpuRegister.R8] = ContextAddress;
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context[CpuRegister.R9] = 0;
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var result = FiberExports.FiberInitialize(context);
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Assert.Equal(ErrorInvalid, result);
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}
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[Fact]
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public void Initialize_Valid_WritesExpectedLayout()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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const string name = "TestFiber";
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WriteCString(memory, NameAddress, name);
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const ulong argOnInitialize = 0xDEADUL;
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const ulong contextSize = 512UL;
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = NameAddress;
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context[CpuRegister.Rdx] = EntryAddress;
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context[CpuRegister.Rcx] = argOnInitialize;
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context[CpuRegister.R8] = ContextAddress;
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context[CpuRegister.R9] = contextSize;
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// RSP defaults to 0 (unmapped); ReadStackArg64 falls back to 0 ->
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// optParam = 0, buildVersion = 0. ApplyInitializationFlags(0, 0, false) == 0.
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var result = FiberExports.FiberInitialize(context);
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Assert.Equal(0, result);
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Assert.Equal(0UL, context[CpuRegister.Rax]);
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Assert.Equal(SignatureStart, ReadUInt32(memory, FiberAddress + 0));
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Assert.Equal(StateIdle, ReadUInt32(memory, FiberAddress + 4));
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Assert.Equal(EntryAddress, ReadUInt64(memory, FiberAddress + 8));
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Assert.Equal(argOnInitialize, ReadUInt64(memory, FiberAddress + 16));
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Assert.Equal(ContextAddress, ReadUInt64(memory, FiberAddress + 24));
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Assert.Equal(contextSize, ReadUInt64(memory, FiberAddress + 32));
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AssertInlineName(memory, FiberAddress + 40, name);
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Assert.Equal(0UL, ReadUInt64(memory, FiberAddress + 72));
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Assert.Equal(0u, ReadUInt32(memory, FiberAddress + 80));
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Assert.Equal(ContextAddress, ReadUInt64(memory, FiberAddress + 88));
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Assert.Equal(ContextAddress + contextSize, ReadUInt64(memory, FiberAddress + 96));
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Assert.Equal(SignatureEnd, ReadUInt32(memory, FiberAddress + 104));
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Assert.Equal(StackSignature, ReadUInt64(memory, ContextAddress));
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}
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[Fact]
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public void GetInfo_AfterInitialize_RoundTripsFields()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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const string name = "RoundTrip";
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WriteCString(memory, NameAddress, name);
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const ulong argOnInitialize = 0xCAFEUL;
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const ulong contextSize = 512UL;
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = NameAddress;
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context[CpuRegister.Rdx] = EntryAddress;
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context[CpuRegister.Rcx] = argOnInitialize;
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context[CpuRegister.R8] = ContextAddress;
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context[CpuRegister.R9] = contextSize;
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Assert.Equal(0, FiberExports.FiberInitialize(context));
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WriteUInt64(memory, InfoAddress, 128);
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = InfoAddress;
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var result = FiberExports.FiberGetInfo(context);
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Assert.Equal(0, result);
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Assert.Equal(EntryAddress, ReadUInt64(memory, InfoAddress + 8));
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Assert.Equal(argOnInitialize, ReadUInt64(memory, InfoAddress + 16));
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Assert.Equal(ContextAddress, ReadUInt64(memory, InfoAddress + 24));
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Assert.Equal(contextSize, ReadUInt64(memory, InfoAddress + 32));
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AssertInlineName(memory, InfoAddress + 40, name);
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Assert.Equal(ulong.MaxValue, ReadUInt64(memory, InfoAddress + 72));
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}
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[Fact]
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public void GetInfo_WrongSize_ReturnsInvalidError()
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{
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var memory = new FakeCpuMemory(Base, RegionSize);
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var context = new CpuContext(memory, Generation.Gen5);
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WriteCString(memory, NameAddress, "F");
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = NameAddress;
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context[CpuRegister.Rdx] = EntryAddress;
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context[CpuRegister.R8] = ContextAddress;
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context[CpuRegister.R9] = 512;
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Assert.Equal(0, FiberExports.FiberInitialize(context));
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WriteUInt64(memory, InfoAddress, 64);
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context[CpuRegister.Rdi] = FiberAddress;
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context[CpuRegister.Rsi] = InfoAddress;
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var result = FiberExports.FiberGetInfo(context);
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Assert.Equal(ErrorInvalid, result);
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}
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private static void WriteCString(FakeCpuMemory memory, ulong address, string text)
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{
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memory.WriteCString(address, text);
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}
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private static void WriteUInt64(FakeCpuMemory memory, ulong address, ulong value)
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{
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Span<byte> buffer = stackalloc byte[sizeof(ulong)];
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BinaryPrimitives.WriteUInt64LittleEndian(buffer, value);
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Assert.True(memory.TryWrite(address, buffer));
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}
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private static uint ReadUInt32(FakeCpuMemory memory, ulong address)
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{
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Span<byte> buffer = stackalloc byte[sizeof(uint)];
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Assert.True(memory.TryRead(address, buffer));
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return BinaryPrimitives.ReadUInt32LittleEndian(buffer);
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}
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private static ulong ReadUInt64(FakeCpuMemory memory, ulong address)
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{
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Span<byte> buffer = stackalloc byte[sizeof(ulong)];
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Assert.True(memory.TryRead(address, buffer));
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return BinaryPrimitives.ReadUInt64LittleEndian(buffer);
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}
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private static void AssertInlineName(FakeCpuMemory memory, ulong address, string expected)
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{
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Span<byte> buffer = stackalloc byte[32];
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Assert.True(memory.TryRead(address, buffer));
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var length = buffer.IndexOf((byte)0);
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if (length < 0)
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{
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length = buffer.Length;
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}
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Assert.Equal(expected, System.Text.Encoding.UTF8.GetString(buffer[..length]));
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}
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}
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