mirror of
https://github.com/par274/sharpemu.git
synced 2026-07-31 23:19:44 +08:00
revert: restore state before huge regression
This commit is contained in:
ParantezTech
@@ -80,13 +80,8 @@ public static partial class AgcExports
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private const uint RIndexCount = 0x1C;
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private const uint SpiShaderPgmLoPs = 0x8;
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private const uint SpiShaderPgmHiPs = 0x9;
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private const uint SpiShaderPgmLoVs = 0x48;
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private const uint SpiShaderPgmHiVs = 0x49;
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private const uint SpiShaderPgmLoEs = 0xC8;
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private const uint SpiShaderPgmHiEs = 0xC9;
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private const uint SpiShaderPgmLoHs = 0x108;
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private const uint SpiShaderPgmHiHs = 0x109;
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private const uint SpiShaderPgmRsrc1Hs = 0x10A;
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private const uint SpiShaderPgmLoLs = 0x148;
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private const uint SpiShaderPgmHiLs = 0x149;
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private const uint SpiShaderPgmLoGs = 0x8A;
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@@ -280,7 +275,6 @@ public static partial class AgcExports
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private static int _tracedVertexRangeCount;
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private static long _dcbWaitRegMemTraceCount;
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private static long _createShaderTraceCount;
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private static long _cbMetadataSkipTraceCount;
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private static long _packetPayloadTraceCount;
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private static bool _tracedMissingPixelShaderBindings;
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private static long _unsatisfiedWaitTraceCount;
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@@ -2971,38 +2965,6 @@ public static partial class AgcExports
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$"arg1=0x{ctx[CpuRegister.Rsi]:X16} arg2=0x{ctx[CpuRegister.Rdx]:X16}");
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return ReturnPointer(ctx, commandAddress);
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}
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// Synthetic labels for uncatalogued AGC helper NIDs; the NID is authoritative.
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#pragma warning disable SHEM006
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[SysAbiExport(
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Nid = "zlqfTyrQSPk",
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ExportName = "sceAgcUnknownZlqfTyrQSPk",
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Target = Generation.Gen5,
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LibraryName = "libSceAgc")]
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public static int UnknownZlqfTyrQSPk(CpuContext ctx)
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{
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TraceAgc(
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$"agc.unknown_zlqf rdi=0x{ctx[CpuRegister.Rdi]:X16} " +
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$"rsi=0x{ctx[CpuRegister.Rsi]:X16} rdx=0x{ctx[CpuRegister.Rdx]:X16} " +
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$"rcx=0x{ctx[CpuRegister.Rcx]:X16} r8=0x{ctx[CpuRegister.R8]:X16} r9=0x{ctx[CpuRegister.R9]:X16}");
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ctx[CpuRegister.Rax] = 0;
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return (int)OrbisGen2Result.ORBIS_GEN2_OK;
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}
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[SysAbiExport(
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Nid = "dZGYu5wObJs",
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ExportName = "sceAgcUnknownDZGYu5wObJs",
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Target = Generation.Gen5,
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LibraryName = "libSceAgc")]
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public static int UnknownDZGYu5wObJs(CpuContext ctx)
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{
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TraceAgc(
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$"agc.unknown_dzgy rdi=0x{ctx[CpuRegister.Rdi]:X16} " +
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$"rsi=0x{ctx[CpuRegister.Rsi]:X16} rdx=0x{ctx[CpuRegister.Rdx]:X16} " +
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$"rcx=0x{ctx[CpuRegister.Rcx]:X16} r8=0x{ctx[CpuRegister.R8]:X16} r9=0x{ctx[CpuRegister.R9]:X16}");
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ctx[CpuRegister.Rax] = 0;
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return (int)OrbisGen2Result.ORBIS_GEN2_OK;
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}
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#pragma warning restore SHEM006
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private static void EnqueueSubmittedDcb(
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@@ -5684,25 +5646,6 @@ public static partial class AgcExports
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}
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state.TranslatedDraw = null;
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state.GuestDrawKind = GuestDrawKind.None;
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// CB modes EliminateFastClear / FmaskDecompress / DccDecompress run
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// colour-buffer metadata ops. The bound shader is only a vehicle and
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// must not be applied as a normal colour draw.
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if (TryGetCbColorControlMode(state.CxRegisters, out var cbMode) &&
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IsCbMetadataColorMode(cbMode))
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{
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if (_traceAgcShader || ShouldTraceHotPath(ref _cbMetadataSkipTraceCount))
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{
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TraceAgcShader(
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$"agc.cb_metadata_skip seq={drawSequence} mode={cbMode} " +
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$"es=0x{(hasExportShader ? exportShaderAddress : 0):X16} " +
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$"ps=0x{(hasPixelShader ? pixelShaderAddress : 0):X16} " +
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$"vertices={vertexCount}");
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}
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return;
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}
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foreach (var target in renderTargets)
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{
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state.KnownRenderTargets[target.Address] = target;
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@@ -6488,32 +6431,6 @@ public static partial class AgcExports
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TraceAstroTitlePixelGlobalProbe(pixelEvaluation);
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}
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// Patch BufferFormat from the attrib table onto the V# before host
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// vertex input. IR discovery often keeps a stale float format from the
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// unpatched sharp — that turns UI glyphs into gradient triangles.
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// Match by stride+offset (not bare base address) so interleaved streams
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// keep loading-video bindings intact.
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if (exportEvaluation.VertexInputs is { Count: > 0 } discoveredInputs &&
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AgcVertexMetadata.TryGetVertexTableRegisters(
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ctx,
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exportShaderAddress,
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exportShaderHeader,
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out var vertexTables))
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{
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var merged = AgcVertexMetadata.MergeVertexInputsFromMetadata(
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ctx,
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exportEvaluation.ScalarRegisters,
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vertexTables,
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discoveredInputs);
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if (!ReferenceEquals(merged, discoveredInputs))
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{
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TraceAgcShader(
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$"agc.vertex_metadata_format es=0x{exportShaderAddress:X16} " +
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$"count={merged.Count}");
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exportEvaluation = exportEvaluation with { VertexInputs = merged };
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}
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}
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// Every bound color target the shader exports to. Deferred renderers
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// draw a multi-render-target G-buffer (up to eight slots) in one pass.
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// Fall back to slot 0 if we cannot match any export to a bound target.
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@@ -7295,7 +7212,6 @@ public static partial class AgcExports
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Mix(input.NumberFormat);
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Mix(input.Stride);
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Mix(input.OffsetBytes);
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Mix(input.PerInstance ? 1u : 0u);
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}
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}
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@@ -7341,35 +7257,6 @@ public static partial class AgcExports
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return hash;
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}
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private enum CbColorMode : byte
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{
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Disable = 0,
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Normal = 1,
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EliminateFastClear = 2,
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Resolve = 3,
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FmaskDecompress = 5,
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DccDecompress = 6,
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}
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private static bool TryGetCbColorControlMode(
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IReadOnlyDictionary<uint, uint> registers,
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out uint mode)
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{
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mode = 0;
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if (!registers.TryGetValue(CbColorControl, out var colorControl))
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{
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return false;
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}
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mode = (colorControl >> 4) & 0x7u;
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return true;
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}
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private static bool IsCbMetadataColorMode(uint mode) =>
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mode is (uint)CbColorMode.EliminateFastClear or
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(uint)CbColorMode.FmaskDecompress or
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(uint)CbColorMode.DccDecompress;
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private static bool TryGetHardwareColorResolveTargets(
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IReadOnlyDictionary<uint, uint> registers,
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out RenderTargetDescriptor source,
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@@ -7377,8 +7264,8 @@ public static partial class AgcExports
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{
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source = default;
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destination = default;
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if (!TryGetCbColorControlMode(registers, out var mode) ||
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mode != (uint)CbColorMode.Resolve)
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if (!registers.TryGetValue(CbColorControl, out var colorControl) ||
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((colorControl >> 4) & 0x7u) != 3u)
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{
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return false;
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}
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@@ -8304,8 +8191,7 @@ public static partial class AgcExports
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binding.OffsetBytes,
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binding.Data,
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binding.DataLength,
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binding.DataPooled,
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binding.PerInstance);
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binding.DataPooled);
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}
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return buffers;
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@@ -11102,14 +10988,18 @@ public static partial class AgcExports
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return false;
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}
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if (!TryReadUInt32(ctx, shRegistersAddress, out var loRegister) ||
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!TryReadUInt32(ctx, shRegistersAddress + 8, out var hiRegister))
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{
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return false;
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}
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var expectedLo = shaderType switch
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{
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0 => ComputePgmLo,
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1 => SpiShaderPgmLoPs,
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2 or 6 => SpiShaderPgmLoEs,
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3 => SpiShaderPgmLoVs,
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4 => SpiShaderPgmLoGs,
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5 => SpiShaderPgmLoHs,
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7 => SpiShaderPgmLoLs,
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_ => 0u,
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};
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@@ -11118,187 +11008,20 @@ public static partial class AgcExports
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0 => ComputePgmHi,
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1 => SpiShaderPgmHiPs,
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2 or 6 => SpiShaderPgmHiEs,
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3 => SpiShaderPgmHiVs,
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4 => SpiShaderPgmHiGs,
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5 => SpiShaderPgmHiHs,
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7 => SpiShaderPgmHiLs,
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_ => 0u,
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};
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// GTA V Enhanced hull shaders (type 5) put RSRC1/RSRC2 (0x10A/0x10B) at
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// the front of the SH default table; PGM_LO/HI sit elsewhere (or are
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// filled later via SetShRegisterDirect).
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if (!TryFindShaderProgramRegisterPair(
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ctx,
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shRegistersAddress,
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registerCount,
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expectedLo,
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expectedHi,
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out var loEntryAddress,
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out var hiEntryAddress,
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out var foundLo,
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out var foundHi))
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if (expectedLo == 0 || loRegister != expectedLo || hiRegister != expectedHi)
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{
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TryReadUInt32(ctx, shRegistersAddress, out var firstLo);
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// GTA V Enhanced HS headers start at RSRC1/RSRC2 (0x10A/0x10B) and
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// omit PGM_LO/HI from the default table. Still succeed: the code VA
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// lives at ShaderCodeOffset and later binder paths republish it.
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if (shaderType == 5 && firstLo is SpiShaderPgmRsrc1Hs or SpiShaderPgmLoHs)
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{
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TraceCreateShader(
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0,
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headerAddress,
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codeAddress,
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$"skip-pgm-patch type=5 first_lo=0x{firstLo:X8}");
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return true;
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}
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TraceCreateShader(
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0,
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headerAddress,
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codeAddress,
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$"unexpected-registers type={shaderType} expected_lo=0x{expectedLo:X8} first_lo=0x{firstLo:X8}");
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TraceCreateShader(0, headerAddress, codeAddress, $"unexpected-registers type={shaderType} lo=0x{loRegister:X8} hi=0x{hiRegister:X8}");
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return false;
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}
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var loValue = (uint)((codeAddress >> 8) & 0xFFFF_FFFFUL);
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var hiValue = (uint)((codeAddress >> 40) & 0xFFUL);
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if (!TryWriteUInt32(ctx, loEntryAddress + sizeof(uint), loValue) ||
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!TryWriteUInt32(ctx, hiEntryAddress + sizeof(uint), hiValue))
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{
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return false;
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}
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if (foundLo != expectedLo || foundHi != expectedHi)
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{
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TraceCreateShader(
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0,
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headerAddress,
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codeAddress,
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$"patched-alt-registers type={shaderType} lo=0x{foundLo:X8} hi=0x{foundHi:X8}");
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}
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return true;
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}
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private static readonly (uint Lo, uint Hi)[] ShaderProgramRegisterPairs =
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[
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(ComputePgmLo, ComputePgmHi),
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(SpiShaderPgmLoPs, SpiShaderPgmHiPs),
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(SpiShaderPgmLoVs, SpiShaderPgmHiVs),
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(SpiShaderPgmLoEs, SpiShaderPgmHiEs),
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(SpiShaderPgmLoGs, SpiShaderPgmHiGs),
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(SpiShaderPgmLoHs, SpiShaderPgmHiHs),
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(SpiShaderPgmLoLs, SpiShaderPgmHiLs),
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];
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private static bool TryFindShaderProgramRegisterPair(
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CpuContext ctx,
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ulong shRegistersAddress,
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byte registerCount,
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uint preferredLo,
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uint preferredHi,
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out ulong loEntryAddress,
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out ulong hiEntryAddress,
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out uint foundLo,
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out uint foundHi)
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{
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loEntryAddress = 0;
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hiEntryAddress = 0;
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foundLo = 0;
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foundHi = 0;
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ulong preferredLoAddress = 0;
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ulong preferredHiAddress = 0;
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ulong fallbackLoAddress = 0;
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ulong fallbackHiAddress = 0;
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uint fallbackLo = 0;
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uint fallbackHi = 0;
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for (uint index = 0; index < registerCount; index++)
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{
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var entryAddress = shRegistersAddress + ((ulong)index * 8);
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if (!TryReadUInt32(ctx, entryAddress, out var offset))
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{
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return false;
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}
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if (preferredLo != 0 && offset == preferredLo)
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{
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preferredLoAddress = entryAddress;
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}
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else if (preferredHi != 0 && offset == preferredHi)
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{
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preferredHiAddress = entryAddress;
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}
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if (fallbackLoAddress != 0)
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{
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continue;
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}
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foreach (var pair in ShaderProgramRegisterPairs)
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{
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if (offset != pair.Lo)
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{
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continue;
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}
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// Prefer a contiguous LO/HI pair when present.
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if (index + 1 < registerCount &&
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TryReadUInt32(ctx, entryAddress + 8, out var nextOffset) &&
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nextOffset == pair.Hi)
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{
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fallbackLoAddress = entryAddress;
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fallbackHiAddress = entryAddress + 8;
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fallbackLo = pair.Lo;
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fallbackHi = pair.Hi;
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break;
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}
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for (uint hiIndex = 0; hiIndex < registerCount; hiIndex++)
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{
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if (hiIndex == index)
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{
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continue;
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}
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var hiAddress = shRegistersAddress + ((ulong)hiIndex * 8);
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if (!TryReadUInt32(ctx, hiAddress, out var hiOffset) || hiOffset != pair.Hi)
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{
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continue;
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}
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fallbackLoAddress = entryAddress;
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fallbackHiAddress = hiAddress;
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fallbackLo = pair.Lo;
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fallbackHi = pair.Hi;
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break;
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}
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break;
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}
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}
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if (preferredLoAddress != 0 && preferredHiAddress != 0)
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{
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loEntryAddress = preferredLoAddress;
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hiEntryAddress = preferredHiAddress;
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foundLo = preferredLo;
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foundHi = preferredHi;
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return true;
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}
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if (fallbackLoAddress != 0 && fallbackHiAddress != 0)
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{
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loEntryAddress = fallbackLoAddress;
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hiEntryAddress = fallbackHiAddress;
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foundLo = fallbackLo;
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foundHi = fallbackHi;
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return true;
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}
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return false;
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return TryWriteUInt32(ctx, shRegistersAddress + sizeof(uint), loValue) &&
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TryWriteUInt32(ctx, shRegistersAddress + 8 + sizeof(uint), hiValue);
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}
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private static bool IsEsGeometryShaderType(byte shaderType) =>
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Reference in New Issue
Block a user